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| author | Tristan Gingold <tgingold@free.fr> | 2018-12-18 06:35:12 +0100 |
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| committer | Tristan Gingold <tgingold@free.fr> | 2018-12-18 07:36:24 +0100 |
| commit | cb79d295c4bdf498e602a3f7e2875613c80ed8d9 (patch) | |
| tree | db29dc5595fa11015cb6b6f61b47c4bdcc2ee85e | |
| parent | 2d7492eb2d24ee2645fe2f2d6d5cc989d5315039 (diff) | |
| download | ghdl-cb79d295c4bdf498e602a3f7e2875613c80ed8d9.tar.gz ghdl-cb79d295c4bdf498e602a3f7e2875613c80ed8d9.tar.bz2 ghdl-cb79d295c4bdf498e602a3f7e2875613c80ed8d9.zip | |
doc: fix quickstart examples.
| -rw-r--r-- | doc/using/QuickStartGuide.rst | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/doc/using/QuickStartGuide.rst b/doc/using/QuickStartGuide.rst index 850011fdd..c4803bcfd 100644 --- a/doc/using/QuickStartGuide.rst +++ b/doc/using/QuickStartGuide.rst @@ -58,11 +58,16 @@ The `heartbeat` program .. code-block:: VHDL - entity hello_world is - port ( clk: out std_logic; ) - end hearbeat; + library ieee; + use ieee.std_logic_1164.all; - architecture behaviour of hello_world is + entity heartbeat is + port ( clk: out std_logic); + end heartbeat; + + architecture behaviour of heartbeat + is + constant clk_period : time := 10 ns; begin -- Clock process definition clk_process: process |