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author | Tristan Gingold <tgingold@free.fr> | 2023-03-23 18:40:43 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2023-03-26 16:53:50 +0200 |
commit | cff00f7c56fe0bdcc05c302c679e22ad04c097f7 (patch) | |
tree | 99230218886c3dd6d99cc1e0050c87080b3a33bd | |
parent | 13a202b6ee9b1b9972a2671a5f1f901f3143df1d (diff) | |
download | ghdl-cff00f7c56fe0bdcc05c302c679e22ad04c097f7.tar.gz ghdl-cff00f7c56fe0bdcc05c302c679e22ad04c097f7.tar.bz2 ghdl-cff00f7c56fe0bdcc05c302c679e22ad04c097f7.zip |
Sem_Array_Aggregate: free subtype definitions if not used.
-rw-r--r-- | src/vhdl/vhdl-sem_expr.adb | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-sem_expr.adb b/src/vhdl/vhdl-sem_expr.adb index 047a62a77..be60e12c8 100644 --- a/src/vhdl/vhdl-sem_expr.adb +++ b/src/vhdl/vhdl-sem_expr.adb @@ -4149,6 +4149,7 @@ package body Vhdl.Sem_Expr is -- Avoid error propagation. Set_Range_Constraint (Info.Index_Subtype, Get_Range_Constraint (Index_Type)); + Set_Is_Ref (Info.Index_Subtype, True); Free_Iir (Index_Subtype_Constraint); else Set_Direction (Index_Subtype_Constraint, Dir); @@ -4346,6 +4347,24 @@ package body Vhdl.Sem_Expr is else Set_Aggregate_Expand_Flag (Aggr, False); end if; + + if Get_Literal_Subtype (Aggr) = Null_Iir then + -- Free the index range info if not used to create the literal + -- subtype. + for I in Infos'Range loop + declare + St : constant Iir := Infos (I).Index_Subtype; + Rng : constant Iir := Get_Range_Constraint (St); + begin + if not Get_Is_Ref (St) then + Free_Iir (Get_Left_Limit_Expr (Rng)); + Free_Iir (Get_Right_Limit_Expr (Rng)); + Free_Iir (Rng); + end if; + Free_Iir (St); + end; + end loop; + end if; else -- If the array is not constrained, expression cannot be more -- static than the type. In particular, if the type is not |