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author | Tristan Gingold <tgingold@free.fr> | 2019-12-03 07:15:32 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-12-03 07:15:32 +0100 |
commit | d3f43030f21cc5a983bf23697d7c5c311e45f9b1 (patch) | |
tree | 7a7512b5b23d4d22d6875bf6d1c20437b75f2de5 | |
parent | e6a643ea1db47dc5fcf3893a81b3193869edbc38 (diff) | |
download | ghdl-d3f43030f21cc5a983bf23697d7c5c311e45f9b1.tar.gz ghdl-d3f43030f21cc5a983bf23697d7c5c311e45f9b1.tar.bz2 ghdl-d3f43030f21cc5a983bf23697d7c5c311e45f9b1.zip |
synth: add static neg for signed.
-rw-r--r-- | src/synth/synth-ieee-numeric_std.adb | 28 | ||||
-rw-r--r-- | src/synth/synth-ieee-numeric_std.ads | 2 | ||||
-rw-r--r-- | src/synth/synth-static_oper.adb | 12 |
3 files changed, 42 insertions, 0 deletions
diff --git a/src/synth/synth-ieee-numeric_std.adb b/src/synth/synth-ieee-numeric_std.adb index 738146014..0a75d0576 100644 --- a/src/synth/synth-ieee-numeric_std.adb +++ b/src/synth/synth-ieee-numeric_std.adb @@ -238,4 +238,32 @@ package body Synth.Ieee.Numeric_Std is return Res; end Mul_Sgn_Sgn; + function Neg_Sgn (V : Std_Logic_Vector) return Std_Logic_Vector + is + pragma Assert (V'First = 1); + Len : constant Integer := V'Last; + subtype Res_Type is Std_Logic_Vector (1 .. Len); + Res : Res_Type; + Vb, Carry : Sl_X01; + begin + if Len < 1 then + return Null_Vec; + end if; + Carry := '1'; + for I in 0 .. Len - 1 loop + Vb := Sl_To_X01 (V (V'Last - I)); + if Vb = 'X' then + --assert NO_WARNING + -- report "NUMERIC_STD.""+"": non logical value detected" + -- severity warning; + Res := (others => 'X'); + exit; + end if; + Vb := Not_Table (Vb); + Res (Res'Last - I) := Xor_Table (Carry, Vb); + Carry := And_Table (Carry, Vb); + end loop; + return Res; + end Neg_Sgn; + end Synth.Ieee.Numeric_Std; diff --git a/src/synth/synth-ieee-numeric_std.ads b/src/synth/synth-ieee-numeric_std.ads index 79ffd6a2f..1d8dacd7b 100644 --- a/src/synth/synth-ieee-numeric_std.ads +++ b/src/synth/synth-ieee-numeric_std.ads @@ -25,6 +25,8 @@ with Synth.Ieee.Std_Logic_1164; use Synth.Ieee.Std_Logic_1164; package Synth.Ieee.Numeric_Std is -- Reminder: vectors elements are from left to right. + function Neg_Sgn (V : Std_Logic_Vector) return Std_Logic_Vector; + function Add_Uns_Uns (L, R : Std_Logic_Vector) return Std_Logic_Vector; function Add_Sgn_Int (L : Std_Logic_Vector; R : Int64) diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index 613e47767..8987e5c5a 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -423,6 +423,18 @@ package body Synth.Static_Oper is (Boolean'Pos (Val = 1 and Zx = 0), Boolean_Type); end; + when Iir_Predefined_Ieee_Numeric_Std_Neg_Sgn => + declare + Op_Arr : Std_Logic_Vector (1 .. Natural (Operand.Arr.Len)); + begin + To_Std_Logic_Vector (Operand, Op_Arr); + declare + Res_Arr : constant Std_Logic_Vector := Neg_Sgn (Op_Arr); + begin + return To_Value_Acc (Res_Arr, Operand.Typ.Vec_El); + end; + end; + when Iir_Predefined_Ieee_1164_Vector_Not => return Synth_Vector_Monadic (Operand, Not_Table); |