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| author | Patrick Lehmann <Paebbels@gmail.com> | 2022-02-23 23:41:45 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-02-23 23:41:45 +0100 |
| commit | 8fb84c1ca46c299996886dd22a7796817015c681 (patch) | |
| tree | 024d4a6333005c406012af6453b1e74957b23eb5 /doc/quick_start/simulation/adder | |
| parent | 1325d61a595f90239a93e90c930c9bcbd725d3b3 (diff) | |
| parent | a8913e8fa4ee1c92ee008a77487a614014c45fb6 (diff) | |
| download | ghdl-8fb84c1ca46c299996886dd22a7796817015c681.tar.gz ghdl-8fb84c1ca46c299996886dd22a7796817015c681.tar.bz2 ghdl-8fb84c1ca46c299996886dd22a7796817015c681.zip | |
Doc: add Overview diagram, fix shields in tables, use extlinks more
Diffstat (limited to 'doc/quick_start/simulation/adder')
| -rw-r--r-- | doc/quick_start/simulation/adder/index.rst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/quick_start/simulation/adder/index.rst b/doc/quick_start/simulation/adder/index.rst index 5ff607801..693d42ef3 100644 --- a/doc/quick_start/simulation/adder/index.rst +++ b/doc/quick_start/simulation/adder/index.rst @@ -5,8 +5,8 @@ ================================= Unlike :ref:`Heartbeat <QuickStart:heartbeat>`, the target hardware design in this example is written using the -synthesisable subset of `VHDL`. It is a `full adder <https://en.wikipedia.org/wiki/Adder_(electronics)#Full_adder>`_ -described in a file named :file:`adder.vhdl`: +synthesisable subset of `VHDL`. It is a :wikipedia:`full adder <Adder_(electronics)#Full_adder>` described in a file +named :file:`adder.vhdl`: .. literalinclude:: adder.vhdl :language: vhdl |