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author | Tristan Gingold <tgingold@free.fr> | 2017-07-02 06:05:07 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2017-07-02 06:05:07 +0200 |
commit | 7cbb32c05ecb54781bf37e0bd424b011fa4b2c58 (patch) | |
tree | 451dbaf4a915b299cb5a2d06dbe11b20441d759d /libraries/synopsys | |
parent | b66b6aca18b2a7ce55d88ad3ee0c5aa4c721a3f5 (diff) | |
download | ghdl-7cbb32c05ecb54781bf37e0bd424b011fa4b2c58.tar.gz ghdl-7cbb32c05ecb54781bf37e0bd424b011fa4b2c58.tar.bz2 ghdl-7cbb32c05ecb54781bf37e0bd424b011fa4b2c58.zip |
Add std_logic_misc to synopsys v08.
For #181
Diffstat (limited to 'libraries/synopsys')
-rw-r--r-- | libraries/synopsys/std_logic_misc-body.vhdl | 10 | ||||
-rw-r--r-- | libraries/synopsys/std_logic_misc.vhdl | 12 |
2 files changed, 17 insertions, 5 deletions
diff --git a/libraries/synopsys/std_logic_misc-body.vhdl b/libraries/synopsys/std_logic_misc-body.vhdl index 531328c3f..84a32bb09 100644 --- a/libraries/synopsys/std_logic_misc-body.vhdl +++ b/libraries/synopsys/std_logic_misc-body.vhdl @@ -94,6 +94,7 @@ package body std_logic_misc is --------------------------------------------------------------------- --synopsys synthesis_on +--START-!V08 function Drive (V: STD_LOGIC_VECTOR) return STD_ULOGIC_VECTOR is -- pragma built_in SYN_FEED_THRU -- pragma subpgm_id 389 @@ -105,6 +106,7 @@ package body std_logic_misc is return STD_ULOGIC_VECTOR(Value); --synopsys synthesis_on end Drive; +--END-!V08 function Drive (V: STD_ULOGIC_VECTOR) return STD_LOGIC_VECTOR is @@ -146,6 +148,7 @@ package body std_logic_misc is end Sense; +--START-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR is -- pragma subpgm_id 392 @@ -165,7 +168,7 @@ package body std_logic_misc is end loop; return Result; end Sense; - +--END-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_ULOGIC_VECTOR is @@ -187,7 +190,7 @@ package body std_logic_misc is return Result; end Sense; - +--START-!V08 function Sense (V: STD_LOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR is -- pragma subpgm_id 394 @@ -228,6 +231,7 @@ package body std_logic_misc is end loop; return Result; end Sense; +--END-!V08 --------------------------------------------------------------------- -- @@ -504,6 +508,7 @@ package body std_logic_misc is -------------------------------------------------------------------------- +--START-!V08 function AND_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is -- pragma subpgm_id 399 variable result: STD_LOGIC; @@ -554,6 +559,7 @@ package body std_logic_misc is begin return not XOR_REDUCE(ARG); end; +--END-!V08 function AND_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01 is -- pragma subpgm_id 405 diff --git a/libraries/synopsys/std_logic_misc.vhdl b/libraries/synopsys/std_logic_misc.vhdl index 999aa8391..409b2a082 100644 --- a/libraries/synopsys/std_logic_misc.vhdl +++ b/libraries/synopsys/std_logic_misc.vhdl @@ -53,7 +53,7 @@ package std_logic_misc is --synopsys synthesis_on function Drive (V: STD_ULOGIC_VECTOR) return STD_LOGIC_VECTOR; - function Drive (V: STD_LOGIC_VECTOR) return STD_ULOGIC_VECTOR; + function Drive (V: STD_LOGIC_VECTOR) return STD_ULOGIC_VECTOR; --!V08 --synopsys synthesis_off --attribute CLOSELY_RELATED_TCF of Drive: function is TRUE; @@ -68,15 +68,19 @@ package std_logic_misc is function Sense (V: STD_ULOGIC; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC; +--START-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR; +--END-!V08 function Sense (V: STD_ULOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_ULOGIC_VECTOR; +--START-!V08 function Sense (V: STD_LOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_LOGIC_VECTOR; function Sense (V: STD_LOGIC_VECTOR; vZ, vU, vDC: STD_ULOGIC) return STD_ULOGIC_VECTOR; +--END-!V08 --synopsys synthesis_on @@ -142,20 +146,22 @@ package std_logic_misc is ) return BIT; -------------------------------------------------------------------- +--START-!V08 function AND_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function NAND_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function OR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function NOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; function XNOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01; - +--END-!V08 + function AND_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function NAND_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function OR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function NOR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function XOR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; function XNOR_REDUCE(ARG: STD_ULOGIC_VECTOR) return UX01; - + --synopsys synthesis_off function fun_BUF3S(Input, Enable: UX01; Strn: STRENGTH) return STD_LOGIC; |