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author | Unai Martinez-Corral <38422348+umarcor@users.noreply.github.com> | 2021-08-23 17:04:46 +0100 |
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committer | GitHub <noreply@github.com> | 2021-08-23 17:04:46 +0100 |
commit | dac2e4dca824f413821962eeac314ceaf56925a7 (patch) | |
tree | 69575b8939b2d550b7f92f0d23e4a0b854dff283 /pyGHDL/dom/InterfaceItem.py | |
parent | 9df82e519d7e93168d43fb414c48c9e547b0c306 (diff) | |
parent | b229fa55b6485350ced8e31d6a803d08544b6d22 (diff) | |
download | ghdl-dac2e4dca824f413821962eeac314ceaf56925a7.tar.gz ghdl-dac2e4dca824f413821962eeac314ceaf56925a7.tar.bz2 ghdl-dac2e4dca824f413821962eeac314ceaf56925a7.zip |
pyGHDL: update to pyVHDLModel v0.11.5 (#1822)
New Features:
* Handle multiple identifiers in generics, ports, parameters and objects.
* `ghdl-dom` now also accepts `-D` for directories to scan.
* Resolve architectures to entities.
* Context reference
* Library clause
* Use clause
* Handle contexts of design units
* New `OpenName`
* Translate concurrent statements:
* Component instantiation
* Entity instantiation
* Configuration instantiation
* If..generate statement
* Case..generate statement
* For..generate statement
* Block statement
* Process statement
* Concurrent simple signal assignment
* Concurrent procedure call
* Translate sequential statements:
* If statement
* Case statement
* For loop
* Sequential simple signal assignment
* Sequential procedure call
* Sequential assert statement
* Sequential report statement
* Wait statement
* Print hierarchy in pretty-print
* New binding to `str_table` `string8_address`
Changes:
* Adjusted to renaming of `pyVHDLModel.VHDLModel` to `pyVHDLModel.SyntaxModel`.
* Adjust DOM to a change in pyVHDLModel: some Identifiers being now a list of identifiers.
* Reordered items in GHA workflow `Test.yml`.
* Improved ranges
Bug fixes:
* Fixed typo in IIR translation of `Greater_Than_Or_Equal_Operator`: should be `GreaterEqualExpression`.
* Wrap type marks in a `SimpleName`.
* Fixed syntax of lists in GHA workflow `Test.yml`.
* Fixed handling of bit-string literals.
Diffstat (limited to 'pyGHDL/dom/InterfaceItem.py')
-rw-r--r-- | pyGHDL/dom/InterfaceItem.py | 98 |
1 files changed, 73 insertions, 25 deletions
diff --git a/pyGHDL/dom/InterfaceItem.py b/pyGHDL/dom/InterfaceItem.py index 4ebea735a..af1b681cd 100644 --- a/pyGHDL/dom/InterfaceItem.py +++ b/pyGHDL/dom/InterfaceItem.py @@ -30,9 +30,11 @@ # # SPDX-License-Identifier: GPL-2.0-or-later # ============================================================================ +from typing import List + from pydecor import export -from pyVHDLModel.VHDLModel import ( +from pyVHDLModel.SyntaxModel import ( GenericConstantInterfaceItem as VHDLModel_GenericConstantInterfaceItem, GenericTypeInterfaceItem as VHDLModel_GenericTypeInterfaceItem, GenericPackageInterfaceItem as VHDLModel_GenericPackageInterfaceItem, @@ -45,7 +47,7 @@ from pyVHDLModel.VHDLModel import ( ParameterFileInterfaceItem as VHDLModel_ParameterFileInterfaceItem, Mode, SubtypeOrSymbol, - Expression, + ExpressionUnion, ) from pyGHDL.libghdl._types import Iir @@ -63,12 +65,12 @@ class GenericConstantInterfaceItem(VHDLModel_GenericConstantInterfaceItem, DOMMi def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], mode: Mode, subtype: SubtypeOrSymbol, - defaultExpression: Expression, + defaultExpression: ExpressionUnion, ): - super().__init__(identifier, mode, subtype, defaultExpression) + super().__init__(identifiers, mode, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -79,7 +81,15 @@ class GenericConstantInterfaceItem(VHDLModel_GenericConstantInterfaceItem, DOMMi default = nodes.Get_Default_Value(genericNode) value = GetExpressionFromNode(default) if default else None - return cls(genericNode, name, mode, subtypeIndication, value) + return cls( + genericNode, + [ + name, + ], + mode, + subtypeIndication, + value, + ) @export @@ -155,12 +165,12 @@ class PortSignalInterfaceItem(VHDLModel_PortSignalInterfaceItem, DOMMixin): def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], mode: Mode, subtype: SubtypeOrSymbol, - defaultExpression: Expression = None, + defaultExpression: ExpressionUnion = None, ): - super().__init__(identifier, mode, subtype, defaultExpression) + super().__init__(identifiers, mode, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -176,7 +186,15 @@ class PortSignalInterfaceItem(VHDLModel_PortSignalInterfaceItem, DOMMixin): else None ) - return cls(portNode, name, mode, subtypeIndication, value) + return cls( + portNode, + [ + name, + ], + mode, + subtypeIndication, + value, + ) @export @@ -186,12 +204,12 @@ class ParameterConstantInterfaceItem( def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], mode: Mode, subtype: SubtypeOrSymbol, - defaultExpression: Expression = None, + defaultExpression: ExpressionUnion = None, ): - super().__init__(identifier, mode, subtype, defaultExpression) + super().__init__(identifiers, mode, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -209,7 +227,15 @@ class ParameterConstantInterfaceItem( else None ) - return cls(parameterNode, name, mode, subtypeIndication, value) + return cls( + parameterNode, + [ + name, + ], + mode, + subtypeIndication, + value, + ) @export @@ -219,12 +245,12 @@ class ParameterVariableInterfaceItem( def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], mode: Mode, subtype: SubtypeOrSymbol, - defaultExpression: Expression = None, + defaultExpression: ExpressionUnion = None, ): - super().__init__(identifier, mode, subtype, defaultExpression) + super().__init__(identifiers, mode, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -242,7 +268,15 @@ class ParameterVariableInterfaceItem( else None ) - return cls(parameterNode, name, mode, subtypeIndication, value) + return cls( + parameterNode, + [ + name, + ], + mode, + subtypeIndication, + value, + ) @export @@ -250,12 +284,12 @@ class ParameterSignalInterfaceItem(VHDLModel_ParameterSignalInterfaceItem, DOMMi def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], mode: Mode, subtype: SubtypeOrSymbol, - defaultExpression: Expression = None, + defaultExpression: ExpressionUnion = None, ): - super().__init__(identifier, mode, subtype, defaultExpression) + super().__init__(identifiers, mode, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -273,7 +307,15 @@ class ParameterSignalInterfaceItem(VHDLModel_ParameterSignalInterfaceItem, DOMMi else None ) - return cls(parameterNode, name, mode, subtypeIndication, value) + return cls( + parameterNode, + [ + name, + ], + mode, + subtypeIndication, + value, + ) @export @@ -281,10 +323,10 @@ class ParameterFileInterfaceItem(VHDLModel_ParameterFileInterfaceItem, DOMMixin) def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], subtype: SubtypeOrSymbol, ): - super().__init__(identifier, subtype) + super().__init__(identifiers, subtype) DOMMixin.__init__(self, node) @classmethod @@ -294,4 +336,10 @@ class ParameterFileInterfaceItem(VHDLModel_ParameterFileInterfaceItem, DOMMixin) parameterNode, "parameter", name ) - return cls(parameterNode, name, subtypeIndication) + return cls( + parameterNode, + [ + name, + ], + subtypeIndication, + ) |