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author | Unai Martinez-Corral <38422348+umarcor@users.noreply.github.com> | 2021-08-23 17:04:46 +0100 |
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committer | GitHub <noreply@github.com> | 2021-08-23 17:04:46 +0100 |
commit | dac2e4dca824f413821962eeac314ceaf56925a7 (patch) | |
tree | 69575b8939b2d550b7f92f0d23e4a0b854dff283 /pyGHDL/dom/Object.py | |
parent | 9df82e519d7e93168d43fb414c48c9e547b0c306 (diff) | |
parent | b229fa55b6485350ced8e31d6a803d08544b6d22 (diff) | |
download | ghdl-dac2e4dca824f413821962eeac314ceaf56925a7.tar.gz ghdl-dac2e4dca824f413821962eeac314ceaf56925a7.tar.bz2 ghdl-dac2e4dca824f413821962eeac314ceaf56925a7.zip |
pyGHDL: update to pyVHDLModel v0.11.5 (#1822)
New Features:
* Handle multiple identifiers in generics, ports, parameters and objects.
* `ghdl-dom` now also accepts `-D` for directories to scan.
* Resolve architectures to entities.
* Context reference
* Library clause
* Use clause
* Handle contexts of design units
* New `OpenName`
* Translate concurrent statements:
* Component instantiation
* Entity instantiation
* Configuration instantiation
* If..generate statement
* Case..generate statement
* For..generate statement
* Block statement
* Process statement
* Concurrent simple signal assignment
* Concurrent procedure call
* Translate sequential statements:
* If statement
* Case statement
* For loop
* Sequential simple signal assignment
* Sequential procedure call
* Sequential assert statement
* Sequential report statement
* Wait statement
* Print hierarchy in pretty-print
* New binding to `str_table` `string8_address`
Changes:
* Adjusted to renaming of `pyVHDLModel.VHDLModel` to `pyVHDLModel.SyntaxModel`.
* Adjust DOM to a change in pyVHDLModel: some Identifiers being now a list of identifiers.
* Reordered items in GHA workflow `Test.yml`.
* Improved ranges
Bug fixes:
* Fixed typo in IIR translation of `Greater_Than_Or_Equal_Operator`: should be `GreaterEqualExpression`.
* Wrap type marks in a `SimpleName`.
* Fixed syntax of lists in GHA workflow `Test.yml`.
* Fixed handling of bit-string literals.
Diffstat (limited to 'pyGHDL/dom/Object.py')
-rw-r--r-- | pyGHDL/dom/Object.py | 97 |
1 files changed, 71 insertions, 26 deletions
diff --git a/pyGHDL/dom/Object.py b/pyGHDL/dom/Object.py index d25acb587..def09d50c 100644 --- a/pyGHDL/dom/Object.py +++ b/pyGHDL/dom/Object.py @@ -30,22 +30,22 @@ # # SPDX-License-Identifier: GPL-2.0-or-later # ============================================================================ -from typing import Union +from typing import Union, List -from pyGHDL.libghdl._types import Iir from pydecor import export -from pyVHDLModel.VHDLModel import ( +from pyVHDLModel.SyntaxModel import ( Constant as VHDLModel_Constant, DeferredConstant as VHDLModel_DeferredConstant, Variable as VHDLModel_Variable, SharedVariable as VHDLModel_SharedVariable, Signal as VHDLModel_Signal, File as VHDLModel_File, - Expression, + ExpressionUnion, SubtypeOrSymbol, ) +from pyGHDL.libghdl._types import Iir from pyGHDL.libghdl.vhdl import nodes from pyGHDL.dom import DOMMixin from pyGHDL.dom._Utils import GetNameOfNode @@ -58,11 +58,11 @@ class Constant(VHDLModel_Constant, DOMMixin): def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], subtype: SubtypeOrSymbol, - defaultExpression: Expression, + defaultExpression: ExpressionUnion, ): - super().__init__(identifier, subtype, defaultExpression) + super().__init__(identifiers, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -78,15 +78,28 @@ class Constant(VHDLModel_Constant, DOMMixin): if defaultValue != nodes.Null_Iir: defaultExpression = GetExpressionFromNode(defaultValue) - return cls(constantNode, name, subtypeIndication, defaultExpression) + return cls( + constantNode, + [ + name, + ], + subtypeIndication, + defaultExpression, + ) else: - return DeferredConstant(constantNode, name, subtypeIndication) + return DeferredConstant( + constantNode, + [ + name, + ], + subtypeIndication, + ) @export class DeferredConstant(VHDLModel_DeferredConstant, DOMMixin): - def __init__(self, node: Iir, identifier: str, subtype: SubtypeOrSymbol): - super().__init__(identifier, subtype) + def __init__(self, node: Iir, identifiers: List[str], subtype: SubtypeOrSymbol): + super().__init__(identifiers, subtype) DOMMixin.__init__(self, node) @classmethod @@ -98,7 +111,13 @@ class DeferredConstant(VHDLModel_DeferredConstant, DOMMixin): constantNode, "deferred constant", name ) - return cls(constantNode, name, subtypeIndication) + return cls( + constantNode, + [ + name, + ], + subtypeIndication, + ) @export @@ -106,11 +125,11 @@ class Variable(VHDLModel_Variable, DOMMixin): def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], subtype: SubtypeOrSymbol, - defaultExpression: Expression, + defaultExpression: ExpressionUnion, ): - super().__init__(identifier, subtype, defaultExpression) + super().__init__(identifiers, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -127,13 +146,20 @@ class Variable(VHDLModel_Variable, DOMMixin): if defaultValue != nodes.Null_Iir: defaultExpression = GetExpressionFromNode(defaultValue) - return cls(variableNode, name, subtypeIndication, defaultExpression) + return cls( + variableNode, + [ + name, + ], + subtypeIndication, + defaultExpression, + ) @export class SharedVariable(VHDLModel_SharedVariable, DOMMixin): - def __init__(self, node: Iir, identifier: str, subtype: SubtypeOrSymbol): - super().__init__(identifier, subtype) + def __init__(self, node: Iir, identifiers: List[str], subtype: SubtypeOrSymbol): + super().__init__(identifiers, subtype) DOMMixin.__init__(self, node) @classmethod @@ -143,7 +169,13 @@ class SharedVariable(VHDLModel_SharedVariable, DOMMixin): name = GetNameOfNode(variableNode) subtypeIndication = GetSubtypeIndicationFromNode(variableNode, "variable", name) - return cls(variableNode, name, subtypeIndication) + return cls( + variableNode, + [ + name, + ], + subtypeIndication, + ) @export @@ -151,11 +183,11 @@ class Signal(VHDLModel_Signal, DOMMixin): def __init__( self, node: Iir, - identifier: str, + identifiers: List[str], subtype: SubtypeOrSymbol, - defaultExpression: Expression, + defaultExpression: ExpressionUnion, ): - super().__init__(identifier, subtype, defaultExpression) + super().__init__(identifiers, subtype, defaultExpression) DOMMixin.__init__(self, node) @classmethod @@ -170,13 +202,20 @@ class Signal(VHDLModel_Signal, DOMMixin): default = nodes.Get_Default_Value(signalNode) defaultExpression = GetExpressionFromNode(default) if default else None - return cls(signalNode, name, subtypeIndication, defaultExpression) + return cls( + signalNode, + [ + name, + ], + subtypeIndication, + defaultExpression, + ) @export class File(VHDLModel_File, DOMMixin): - def __init__(self, node: Iir, identifier: str, subtype: SubtypeOrSymbol): - super().__init__(identifier, subtype) + def __init__(self, node: Iir, identifiers: List[str], subtype: SubtypeOrSymbol): + super().__init__(identifiers, subtype) DOMMixin.__init__(self, node) @classmethod @@ -188,4 +227,10 @@ class File(VHDLModel_File, DOMMixin): # FIXME: handle file open stuff - return cls(fileNode, name, subtypeIndication) + return cls( + fileNode, + [ + name, + ], + subtypeIndication, + ) |