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authorXiretza <xiretza@xiretza.xyz>2021-02-10 19:17:23 +0100
committertgingold <tgingold@users.noreply.github.com>2021-02-10 21:36:22 +0100
commitd52693df5bc7480c3917b7248f8602f2942aeab7 (patch)
tree6404e02d6f053a6b53c561c6b60a6a54152a9e63 /pyGHDL/dom
parent8f563f9df8ad94e44f1bd8eecd91d5611e507cc7 (diff)
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pyGHDL: format using black
Diffstat (limited to 'pyGHDL/dom')
-rw-r--r--pyGHDL/dom/Common.py46
-rw-r--r--pyGHDL/dom/DesignUnit.py119
-rw-r--r--pyGHDL/dom/InterfaceItem.py36
-rw-r--r--pyGHDL/dom/Misc.py167
-rw-r--r--pyGHDL/dom/__init__.py2
5 files changed, 193 insertions, 177 deletions
diff --git a/pyGHDL/dom/Common.py b/pyGHDL/dom/Common.py
index 1b52da181..646e074e5 100644
--- a/pyGHDL/dom/Common.py
+++ b/pyGHDL/dom/Common.py
@@ -39,46 +39,46 @@ from pydecor import export
from pyVHDLModel.VHDLModel import Mode
-from pyGHDL.libghdl import name_table
-from pyGHDL.libghdl.vhdl import nodes
+from pyGHDL.libghdl import name_table
+from pyGHDL.libghdl.vhdl import nodes
__all__ = []
@export
class GHDLBaseException(Exception):
- pass
+ pass
@export
class LibGHDLException(GHDLBaseException):
- pass
+ pass
@export
class GHDLException(GHDLBaseException):
- pass
+ pass
@export
class GHDLMixin:
- _MODE_TRANSLATION = {
- nodes.Iir_Mode.In_Mode: Mode.In,
- nodes.Iir_Mode.Out_Mode: Mode.Out,
- nodes.Iir_Mode.Inout_Mode: Mode.InOut,
- nodes.Iir_Mode.Buffer_Mode: Mode.Buffer,
- nodes.Iir_Mode.Linkage_Mode: Mode.Linkage
- }
+ _MODE_TRANSLATION = {
+ nodes.Iir_Mode.In_Mode: Mode.In,
+ nodes.Iir_Mode.Out_Mode: Mode.Out,
+ nodes.Iir_Mode.Inout_Mode: Mode.InOut,
+ nodes.Iir_Mode.Buffer_Mode: Mode.Buffer,
+ nodes.Iir_Mode.Linkage_Mode: Mode.Linkage,
+ }
- @classmethod
- def _ghdlNodeToName(cls, node) -> str:
- """Return the python string from node :obj:`node` identifier"""
- return name_table.Get_Name_Ptr(nodes.Get_Identifier(node))
+ @classmethod
+ def _ghdlNodeToName(cls, node) -> str:
+ """Return the python string from node :obj:`node` identifier"""
+ return name_table.Get_Name_Ptr(nodes.Get_Identifier(node))
- @classmethod
- def _ghdlPortToMode(cls, port):
- """Return the mode of a :obj:`port`."""
- try:
- return cls._MODE_TRANSLATION[nodes.Get_Mode(port)]
- except KeyError:
- raise LibGHDLException("Unknown mode.")
+ @classmethod
+ def _ghdlPortToMode(cls, port):
+ """Return the mode of a :obj:`port`."""
+ try:
+ return cls._MODE_TRANSLATION[nodes.Get_Mode(port)]
+ except KeyError:
+ raise LibGHDLException("Unknown mode.")
diff --git a/pyGHDL/dom/DesignUnit.py b/pyGHDL/dom/DesignUnit.py
index 35ee8132b..4cf1ac2ad 100644
--- a/pyGHDL/dom/DesignUnit.py
+++ b/pyGHDL/dom/DesignUnit.py
@@ -41,100 +41,103 @@ This module contains all DOM classes for VHDL's design units (:class:`entity <En
"""
from pydecor import export
-from pyVHDLModel.VHDLModel import Entity as VHDLModel_Entity
-from pyVHDLModel.VHDLModel import Architecture as VHDLModel_Architecture
-from pyVHDLModel.VHDLModel import Package as VHDLModel_Package
-from pyVHDLModel.VHDLModel import PackageBody as VHDLModel_PackageBody
-from pyVHDLModel.VHDLModel import Context as VHDLModel_Context
+from pyVHDLModel.VHDLModel import Entity as VHDLModel_Entity
+from pyVHDLModel.VHDLModel import Architecture as VHDLModel_Architecture
+from pyVHDLModel.VHDLModel import Package as VHDLModel_Package
+from pyVHDLModel.VHDLModel import PackageBody as VHDLModel_PackageBody
+from pyVHDLModel.VHDLModel import Context as VHDLModel_Context
from pyVHDLModel.VHDLModel import Configuration as VHDLModel_Configuration
-from pyGHDL.libghdl.vhdl import nodes
+from pyGHDL.libghdl.vhdl import nodes
import pyGHDL.libghdl.utils as pyutils
-from pyGHDL.dom.Common import GHDLMixin
-from pyGHDL.dom.InterfaceItem import GenericConstantInterfaceItem, PortSignalInterfaceItem
+from pyGHDL.dom.Common import GHDLMixin
+from pyGHDL.dom.InterfaceItem import (
+ GenericConstantInterfaceItem,
+ PortSignalInterfaceItem,
+)
__all__ = []
@export
class Entity(VHDLModel_Entity, GHDLMixin):
+ @classmethod
+ def parse(cls, libraryUnit):
+ name = cls._ghdlNodeToName(libraryUnit)
+ entity = cls(name)
- @classmethod
- def parse(cls, libraryUnit):
- name = cls._ghdlNodeToName(libraryUnit)
- entity = cls(name)
+ cls.__parseGenerics(libraryUnit, entity)
+ cls.__parsePorts(libraryUnit, entity)
- cls.__parseGenerics(libraryUnit, entity)
- cls.__parsePorts(libraryUnit, entity)
+ return entity
- return entity
+ @classmethod
+ def __ghdlGetGenerics(cls, entity):
+ return pyutils.chain_iter(nodes.Get_Generic_Chain(entity))
- @classmethod
- def __ghdlGetGenerics(cls, entity):
- return pyutils.chain_iter(nodes.Get_Generic_Chain(entity))
+ @classmethod
+ def __ghdlGetPorts(cls, entity):
+ return pyutils.chain_iter(nodes.Get_Port_Chain(entity))
- @classmethod
- def __ghdlGetPorts(cls, entity):
- return pyutils.chain_iter(nodes.Get_Port_Chain(entity))
+ @classmethod
+ def __parseGenerics(cls, libraryUnit, entity):
+ for generic in cls.__ghdlGetGenerics(libraryUnit):
+ genericConstant = GenericConstantInterfaceItem.parse(generic)
+ entity.GenericItems.append(genericConstant)
- @classmethod
- def __parseGenerics(cls, libraryUnit, entity):
- for generic in cls.__ghdlGetGenerics(libraryUnit):
- genericConstant = GenericConstantInterfaceItem.parse(generic)
- entity.GenericItems.append(genericConstant)
+ @classmethod
+ def __parsePorts(cls, libraryUnit, entity):
+ for port in cls.__ghdlGetPorts(libraryUnit):
+ signalPort = PortSignalInterfaceItem.parse(port)
+ entity.PortItems.append(signalPort)
- @classmethod
- def __parsePorts(cls, libraryUnit, entity):
- for port in cls.__ghdlGetPorts(libraryUnit):
- signalPort = PortSignalInterfaceItem.parse(port)
- entity.PortItems.append(signalPort)
@export
class Architecture(VHDLModel_Architecture, GHDLMixin):
- def __init__(self, name: str, entityName: str):
- super().__init__(name)
+ def __init__(self, name: str, entityName: str):
+ super().__init__(name)
- self.__entityName = entityName
+ self.__entityName = entityName
- @classmethod
- def parse(cls, libraryUnit):
- name = cls._ghdlNodeToName(libraryUnit)
- entityName = cls._ghdlNodeToName(nodes.Get_Entity_Name(libraryUnit))
+ @classmethod
+ def parse(cls, libraryUnit):
+ name = cls._ghdlNodeToName(libraryUnit)
+ entityName = cls._ghdlNodeToName(nodes.Get_Entity_Name(libraryUnit))
- return cls(name, entityName)
+ return cls(name, entityName)
+
+ def resolve(self):
+ pass
- def resolve(self):
- pass
@export
class Package(VHDLModel_Package, GHDLMixin):
+ @classmethod
+ def parse(cls, libraryUnit):
+ name = cls._ghdlNodeToName(libraryUnit)
+ return cls(name)
- @classmethod
- def parse(cls, libraryUnit):
- name = cls._ghdlNodeToName(libraryUnit)
- return cls(name)
@export
class PackageBody(VHDLModel_PackageBody, GHDLMixin):
+ @classmethod
+ def parse(cls, libraryUnit):
+ name = cls._ghdlNodeToName(libraryUnit)
+ return cls(name)
- @classmethod
- def parse(cls, libraryUnit):
- name = cls._ghdlNodeToName(libraryUnit)
- return cls(name)
@export
class Context(VHDLModel_Context, GHDLMixin):
+ @classmethod
+ def parse(cls, libraryUnit):
+ name = cls._ghdlNodeToName(libraryUnit)
+ return cls(name)
- @classmethod
- def parse(cls, libraryUnit):
- name = cls._ghdlNodeToName(libraryUnit)
- return cls(name)
@export
class Configuration(VHDLModel_Configuration, GHDLMixin):
-
- @classmethod
- def parse(cls, libraryUnit):
- name = cls._ghdlNodeToName(libraryUnit)
- return cls(name)
+ @classmethod
+ def parse(cls, libraryUnit):
+ name = cls._ghdlNodeToName(libraryUnit)
+ return cls(name)
diff --git a/pyGHDL/dom/InterfaceItem.py b/pyGHDL/dom/InterfaceItem.py
index 94f436877..0134655d5 100644
--- a/pyGHDL/dom/InterfaceItem.py
+++ b/pyGHDL/dom/InterfaceItem.py
@@ -31,35 +31,39 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# ============================================================================
-from pydecor import export
+from pydecor import export
-from pyVHDLModel.VHDLModel import PortSignalInterfaceItem as VHDLModel_PortSignalInterfaceItem
-from pyVHDLModel.VHDLModel import GenericConstantInterfaceItem as VHDLModel_GenericConstantInterfaceItem
+from pyVHDLModel.VHDLModel import (
+ PortSignalInterfaceItem as VHDLModel_PortSignalInterfaceItem,
+)
+from pyVHDLModel.VHDLModel import (
+ GenericConstantInterfaceItem as VHDLModel_GenericConstantInterfaceItem,
+)
-from pyGHDL.dom.Common import GHDLMixin
+from pyGHDL.dom.Common import GHDLMixin
__all__ = []
@export
class GenericConstantInterfaceItem(VHDLModel_GenericConstantInterfaceItem, GHDLMixin):
- @classmethod
- def parse(cls, generic):
- name = cls._ghdlNodeToName(generic)
- mode = cls._ghdlPortToMode(generic)
+ @classmethod
+ def parse(cls, generic):
+ name = cls._ghdlNodeToName(generic)
+ mode = cls._ghdlPortToMode(generic)
- generic = cls(name, mode)
+ generic = cls(name, mode)
- return generic
+ return generic
@export
class PortSignalInterfaceItem(VHDLModel_PortSignalInterfaceItem, GHDLMixin):
- @classmethod
- def parse(cls, port):
- name = cls._ghdlNodeToName(port)
- mode = cls._ghdlPortToMode(port)
+ @classmethod
+ def parse(cls, port):
+ name = cls._ghdlNodeToName(port)
+ mode = cls._ghdlPortToMode(port)
- port = cls(name, mode)
+ port = cls(name, mode)
- return port
+ return port
diff --git a/pyGHDL/dom/Misc.py b/pyGHDL/dom/Misc.py
index bf8bc4be3..43c201c46 100644
--- a/pyGHDL/dom/Misc.py
+++ b/pyGHDL/dom/Misc.py
@@ -36,106 +36,115 @@
Add a module documentation.
"""
from pathlib import Path
-from typing import Any
+from typing import Any
from pydecor import export
-from pyVHDLModel.VHDLModel import Design as VHDLModel_Design
-from pyVHDLModel.VHDLModel import Library as VHDLModel_Library
-from pyVHDLModel.VHDLModel import Document as VHDLModel_Document
+from pyVHDLModel.VHDLModel import Design as VHDLModel_Design
+from pyVHDLModel.VHDLModel import Library as VHDLModel_Library
+from pyVHDLModel.VHDLModel import Document as VHDLModel_Document
-import pyGHDL.libghdl as libghdl
-from pyGHDL.libghdl import name_table, files_map, errorout_memory
-from pyGHDL.libghdl.vhdl import nodes, sem_lib
+import pyGHDL.libghdl as libghdl
+from pyGHDL.libghdl import name_table, files_map, errorout_memory
+from pyGHDL.libghdl.vhdl import nodes, sem_lib
-from pyGHDL.dom.Common import LibGHDLException, GHDLException
-from pyGHDL.dom.DesignUnit import Entity, Architecture, Package, PackageBody, Context, Configuration
+from pyGHDL.dom.Common import LibGHDLException, GHDLException
+from pyGHDL.dom.DesignUnit import (
+ Entity,
+ Architecture,
+ Package,
+ PackageBody,
+ Context,
+ Configuration,
+)
__all__ = []
@export
class Design(VHDLModel_Design):
- def __init__(self):
- super().__init__()
+ def __init__(self):
+ super().__init__()
- self.__ghdl_init()
+ self.__ghdl_init()
- def __ghdl_init(self):
- """Initialization: set options and then load libraries"""
- # Initialize libghdl
- libghdl.finalize()
- libghdl.initialize()
+ def __ghdl_init(self):
+ """Initialization: set options and then load libraries"""
+ # Initialize libghdl
+ libghdl.finalize()
+ libghdl.initialize()
- # Collect error messages in memory
- errorout_memory.Install_Handler()
+ # Collect error messages in memory
+ errorout_memory.Install_Handler()
- libghdl.set_option("--std=08")
+ libghdl.set_option("--std=08")
- # Finish initialization. This will load the standard package.
- if libghdl.analyze_init_status() != 0:
- raise LibGHDLException("Error initializing 'libghdl'.")
+ # Finish initialization. This will load the standard package.
+ if libghdl.analyze_init_status() != 0:
+ raise LibGHDLException("Error initializing 'libghdl'.")
@export
class Library(VHDLModel_Library):
- pass
+ pass
@export
class Document(VHDLModel_Document):
- __ghdlFileID: Any
- __ghdlSourceFileEntry: Any
- __ghdlFile: Any
-
- def __init__(self, path : Path = None, dontParse: bool = False):
- super().__init__(path)
-
- self.__ghdl_init()
- if (dontParse == False):
- self.parse()
-
- def __ghdl_init(self):
- # Read input file
- self.__ghdlFileID = name_table.Get_Identifier(str(self.Path))
- self.__ghdlSourceFileEntry = files_map.Read_Source_File(name_table.Null_Identifier, self.__ghdlFileID)
- if self.__ghdlSourceFileEntry == files_map.No_Source_File_Entry:
- raise LibGHDLException("Cannot load file '{!s}'".format(self.Path))
-
- # parse
- self.__ghdlFile = sem_lib.Load_File(self.__ghdlSourceFileEntry)
-
- def parse(self):
- unit = nodes.Get_First_Design_Unit(self.__ghdlFile)
- while unit != nodes.Null_Iir:
- libraryUnit = nodes.Get_Library_Unit(unit)
- nodeKind = nodes.Get_Kind(libraryUnit)
-
- if (nodeKind == nodes.Iir_Kind.Entity_Declaration):
- entity = Entity.parse(libraryUnit)
- self.Entities.append(entity)
-
- elif (nodeKind == nodes.Iir_Kind.Architecture_Body):
- architecture = Architecture.parse(libraryUnit)
- self.Architectures.append(architecture)
-
- elif (nodeKind == nodes.Iir_Kind.Package_Declaration):
- package = Package.parse(libraryUnit)
- self.Packages.append(package)
-
- elif (nodeKind == nodes.Iir_Kind.Package_Body):
- packageBody = PackageBody.parse(libraryUnit)
- self.PackageBodies.append(packageBody)
-
- elif (nodeKind == nodes.Iir_Kind.Context_Declaration):
- context = Context.parse(libraryUnit)
- self.Contexts.append(context)
-
- elif (nodeKind == nodes.Iir_Kind.Configuration_Declaration):
- configuration = Configuration.parse(libraryUnit)
- self.Configurations.append(configuration)
-
- else:
- raise GHDLException("Unknown design unit kind.")
-
- unit = nodes.Get_Chain(unit)
+ __ghdlFileID: Any
+ __ghdlSourceFileEntry: Any
+ __ghdlFile: Any
+
+ def __init__(self, path: Path = None, dontParse: bool = False):
+ super().__init__(path)
+
+ self.__ghdl_init()
+ if dontParse == False:
+ self.parse()
+
+ def __ghdl_init(self):
+ # Read input file
+ self.__ghdlFileID = name_table.Get_Identifier(str(self.Path))
+ self.__ghdlSourceFileEntry = files_map.Read_Source_File(
+ name_table.Null_Identifier, self.__ghdlFileID
+ )
+ if self.__ghdlSourceFileEntry == files_map.No_Source_File_Entry:
+ raise LibGHDLException("Cannot load file '{!s}'".format(self.Path))
+
+ # parse
+ self.__ghdlFile = sem_lib.Load_File(self.__ghdlSourceFileEntry)
+
+ def parse(self):
+ unit = nodes.Get_First_Design_Unit(self.__ghdlFile)
+ while unit != nodes.Null_Iir:
+ libraryUnit = nodes.Get_Library_Unit(unit)
+ nodeKind = nodes.Get_Kind(libraryUnit)
+
+ if nodeKind == nodes.Iir_Kind.Entity_Declaration:
+ entity = Entity.parse(libraryUnit)
+ self.Entities.append(entity)
+
+ elif nodeKind == nodes.Iir_Kind.Architecture_Body:
+ architecture = Architecture.parse(libraryUnit)
+ self.Architectures.append(architecture)
+
+ elif nodeKind == nodes.Iir_Kind.Package_Declaration:
+ package = Package.parse(libraryUnit)
+ self.Packages.append(package)
+
+ elif nodeKind == nodes.Iir_Kind.Package_Body:
+ packageBody = PackageBody.parse(libraryUnit)
+ self.PackageBodies.append(packageBody)
+
+ elif nodeKind == nodes.Iir_Kind.Context_Declaration:
+ context = Context.parse(libraryUnit)
+ self.Contexts.append(context)
+
+ elif nodeKind == nodes.Iir_Kind.Configuration_Declaration:
+ configuration = Configuration.parse(libraryUnit)
+ self.Configurations.append(configuration)
+
+ else:
+ raise GHDLException("Unknown design unit kind.")
+
+ unit = nodes.Get_Chain(unit)
diff --git a/pyGHDL/dom/__init__.py b/pyGHDL/dom/__init__.py
index 39ba78ba8..b57c20c28 100644
--- a/pyGHDL/dom/__init__.py
+++ b/pyGHDL/dom/__init__.py
@@ -31,6 +31,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# ============================================================================
-from pydecor import export
+from pydecor import export
__all__ = []