vhdl: add force and release tokens. For #1416

2 files changed, 127 insertions, 125 deletions

diff --git a/python/libghdl/thin/std_names.py b/python/libghdl/thin/std_names.py
index ba1686a9e..f7bd4fef6 100644
--- a/python/libghdl/thin/std_names.py
+++ b/python/libghdl/thin/std_names.py
@@ -107,78 +107,78 @@ class Name:
     Context = 356
     Cover = 357
     Default = 358
-    Parameter = 359
-    Property = 360
-    Restrict = 361
-    Restrict_Guarantee = 362
-    Sequence = 363
-    Vmode = 364
-    Vprop = 365
-    Vunit = 366
-    Last_Vhdl08 = 366
-    First_Ams_Keyword = 367
-    Across = 367
-    Break = 368
-    Limit = 369
-    Nature = 370
-    Noise = 371
-    Procedural = 372
-    Quantity = 373
-    Reference = 374
-    Spectrum = 375
-    Subnature = 376
-    Terminal = 377
-    Through = 378
-    Tolerance = 379
-    Last_AMS_Vhdl = 379
-    Last_Keyword = 379
-    First_Verilog = 380
-    Always = 380
-    Assign = 381
-    Buf = 382
-    Bufif0 = 383
-    Bufif1 = 384
-    Casex = 385
-    Casez = 386
-    Cmos = 387
-    Deassign = 388
-    Defparam = 389
-    Disable = 390
-    Edge = 391
-    Endcase = 392
-    Endfunction = 393
-    Endmodule = 394
-    Endprimitive = 395
-    Endspecify = 396
-    Endtable = 397
-    Endtask = 398
-    Force = 399
-    Forever = 400
-    Fork = 401
-    Highz0 = 402
-    Highz1 = 403
-    Ifnone = 404
-    Initial = 405
-    Input = 406
-    Join = 407
-    Large = 408
-    Macromodule = 409
-    Medium = 410
-    Module = 411
-    Negedge = 412
-    Nmos = 413
-    Notif0 = 414
-    Notif1 = 415
-    Output = 416
-    Pmos = 417
-    Posedge = 418
-    Primitive = 419
-    Pull0 = 420
-    Pull1 = 421
-    Pulldown = 422
-    Pullup = 423
-    Realtime = 424
-    Release = 425
+    Force = 359
+    Parameter = 360
+    Property = 361
+    Release = 362
+    Restrict = 363
+    Restrict_Guarantee = 364
+    Sequence = 365
+    Vmode = 366
+    Vprop = 367
+    Vunit = 368
+    Last_Vhdl08 = 368
+    First_Ams_Keyword = 369
+    Across = 369
+    Break = 370
+    Limit = 371
+    Nature = 372
+    Noise = 373
+    Procedural = 374
+    Quantity = 375
+    Reference = 376
+    Spectrum = 377
+    Subnature = 378
+    Terminal = 379
+    Through = 380
+    Tolerance = 381
+    Last_AMS_Vhdl = 381
+    Last_Keyword = 381
+    First_Verilog = 382
+    Always = 382
+    Assign = 383
+    Buf = 384
+    Bufif0 = 385
+    Bufif1 = 386
+    Casex = 387
+    Casez = 388
+    Cmos = 389
+    Deassign = 390
+    Defparam = 391
+    Disable = 392
+    Edge = 393
+    Endcase = 394
+    Endfunction = 395
+    Endmodule = 396
+    Endprimitive = 397
+    Endspecify = 398
+    Endtable = 399
+    Endtask = 400
+    Forever = 401
+    Fork = 402
+    Highz0 = 403
+    Highz1 = 404
+    Ifnone = 405
+    Initial = 406
+    Input = 407
+    Join = 408
+    Large = 409
+    Macromodule = 410
+    Medium = 411
+    Module = 412
+    Negedge = 413
+    Nmos = 414
+    Notif0 = 415
+    Notif1 = 416
+    Output = 417
+    Pmos = 418
+    Posedge = 419
+    Primitive = 420
+    Pull0 = 421
+    Pull1 = 422
+    Pulldown = 423
+    Pullup = 424
+    Realtime = 425
     Reg = 426
     Repeat = 427
     Rcmos = 428
diff --git a/python/libghdl/thin/vhdl/tokens.py b/python/libghdl/thin/vhdl/tokens.py
index b38554d23..e66f97c27 100644
--- a/python/libghdl/thin/vhdl/tokens.py
+++ b/python/libghdl/thin/vhdl/tokens.py
@@ -165,56 +165,58 @@ class Tok:
     Context = 161
     Cover = 162
     Default = 163
-    Parameter = 164
-    Property = 165
-    Restrict = 166
-    Restrict_Guarantee = 167
-    Sequence = 168
-    Vmode = 169
-    Vprop = 170
-    Vunit = 171
-    Across = 172
-    Break = 173
-    Limit = 174
-    Nature = 175
-    Noise = 176
-    Procedural = 177
-    Quantity = 178
-    Reference = 179
-    Spectrum = 180
-    Subnature = 181
-    Terminal = 182
-    Through = 183
-    Tolerance = 184
-    Psl_Clock = 185
-    Psl_Endpoint = 186
-    Psl_Const = 187
-    Psl_Boolean = 188
-    Inf = 189
-    Within = 190
-    Abort = 191
-    Before = 192
-    Before_Em = 193
-    Before_Un = 194
-    Before_Em_Un = 195
-    Always = 196
-    Never = 197
-    Eventually_Em = 198
-    Next_Em = 199
-    Next_A = 200
-    Next_A_Em = 201
-    Next_E = 202
-    Next_E_Em = 203
-    Next_Event = 204
-    Next_Event_Em = 205
-    Next_Event_A = 206
-    Next_Event_A_Em = 207
-    Next_Event_E = 208
-    Next_Event_E_Em = 209
-    Until_Em = 210
-    Until_Un = 211
-    Until_Em_Un = 212
-    Prev = 213
-    Stable = 214
-    Fell = 215
-    Rose = 216
+    Force = 164
+    Parameter = 165
+    Property = 166
+    Release = 167
+    Restrict = 168
+    Restrict_Guarantee = 169
+    Sequence = 170
+    Vmode = 171
+    Vprop = 172
+    Vunit = 173
+    Across = 174
+    Break = 175
+    Limit = 176
+    Nature = 177
+    Noise = 178
+    Procedural = 179
+    Quantity = 180
+    Reference = 181
+    Spectrum = 182
+    Subnature = 183
+    Terminal = 184
+    Through = 185
+    Tolerance = 186
+    Psl_Clock = 187
+    Psl_Endpoint = 188
+    Psl_Const = 189
+    Psl_Boolean = 190
+    Inf = 191
+    Within = 192
+    Abort = 193
+    Before = 194
+    Before_Em = 195
+    Before_Un = 196
+    Before_Em_Un = 197
+    Always = 198
+    Never = 199
+    Eventually_Em = 200
+    Next_Em = 201
+    Next_A = 202
+    Next_A_Em = 203
+    Next_E = 204
+    Next_E_Em = 205
+    Next_Event = 206
+    Next_Event_Em = 207
+    Next_Event_A = 208
+    Next_Event_A_Em = 209
+    Next_Event_E = 210
+    Next_Event_E_Em = 211
+    Until_Em = 212
+    Until_Un = 213
+    Until_Em_Un = 214
+    Prev = 215
+    Stable = 216
+    Fell = 217
+    Rose = 218