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authorTristan Gingold <tgingold@free.fr>2019-06-29 03:38:15 +0200
committerTristan Gingold <tgingold@free.fr>2019-06-29 03:38:15 +0200
commite11afef1e7ffbf22bf0aaac0a7166b0aeee9fd2f (patch)
tree728b3fb552a982205563bb36242fc1f7aecfcfa0 /src/ghdldrv/ghdlrun.adb
parentec43db0fb7543b62ab9d326e978cceb70defe58e (diff)
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ghdldrv: refactoring - share more code, isolate ghdlsynth from ghdlsimul.
Diffstat (limited to 'src/ghdldrv/ghdlrun.adb')
-rw-r--r--src/ghdldrv/ghdlrun.adb53
1 files changed, 15 insertions, 38 deletions
diff --git a/src/ghdldrv/ghdlrun.adb b/src/ghdldrv/ghdlrun.adb
index 1305ad28a..f82de30e0 100644
--- a/src/ghdldrv/ghdlrun.adb
+++ b/src/ghdldrv/ghdlrun.adb
@@ -28,27 +28,25 @@ with Ghdlmain; use Ghdlmain;
with Ghdllocal; use Ghdllocal;
with Simple_IO; use Simple_IO;
-with Ortho_Jit;
-with Ortho_Nodes; use Ortho_Nodes;
-with Trans_Decls;
-with Vhdl.Nodes; use Vhdl.Nodes;
-with Vhdl.Std_Package;
+with Str_Table;
+with Hash;
+with Interning;
+with Files_Map;
+with Name_Table;
with Flags;
with Errorout; use Errorout;
+
+with Vhdl.Nodes; use Vhdl.Nodes;
+with Vhdl.Std_Package;
with Vhdl.Errors; use Vhdl.Errors;
-with Libraries;
with Vhdl.Canon;
-with Vhdl.Configuration;
-with Trans_Be;
-with Translation;
with Vhdl.Ieee.Std_Logic_1164;
-
with Vhdl.Lists;
-with Str_Table;
-with Hash;
-with Interning;
-with Files_Map;
-with Name_Table;
+with Ortho_Jit;
+with Ortho_Nodes; use Ortho_Nodes;
+with Trans_Decls;
+with Trans_Be;
+with Translation;
with Grt.Main;
with Grt.Modules;
@@ -119,18 +117,7 @@ package body Ghdlrun is
procedure Compile_Init (Analyze_Only : Boolean) is
begin
- if Analyze_Only then
- Setup_Libraries (True);
- else
- Setup_Libraries (False);
- Libraries.Load_Std_Library;
- -- WORK library is not loaded. FIXME: why ?
- end if;
-
- if Time_Resolution /= 'a' then
- Vhdl.Std_Package.Set_Time_Resolution (Time_Resolution);
- end if;
-
+ Common_Compile_Init (Analyze_Only);
if Analyze_Only then
return;
end if;
@@ -160,17 +147,7 @@ package body Ghdlrun is
is
Config : Iir;
begin
- Extract_Elab_Unit (Cmd_Name, Args, Opt_Arg);
- if Sec_Name = null then
- Sec_Name := new String'("");
- end if;
-
- Flags.Flag_Elaborate := True;
-
- Config := Vhdl.Configuration.Configure (Prim_Name.all, Sec_Name.all);
- if Config = Null_Iir then
- raise Compilation_Error;
- end if;
+ Common_Compile_Elab (Cmd_Name, Args, Opt_Arg, Config);
if Time_Resolution = 'a' then
Time_Resolution := Vhdl.Std_Package.Get_Minimal_Time_Resolution;