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author | Tristan Gingold <tgingold@free.fr> | 2022-05-26 13:37:28 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-05-26 13:37:28 +0200 |
commit | ba126785e1ce562f242b1a104ada9cfb554f62e8 (patch) | |
tree | 235d365719d1b625b05084b92d73cf7705f5e5f0 /src/ghdldrv | |
parent | 58712f5c52fbe00dc83e8db9c5e262853e2b7617 (diff) | |
download | ghdl-ba126785e1ce562f242b1a104ada9cfb554f62e8.tar.gz ghdl-ba126785e1ce562f242b1a104ada9cfb554f62e8.tar.bz2 ghdl-ba126785e1ce562f242b1a104ada9cfb554f62e8.zip |
vhdl-canon: add Canon_Add_Suspend_State
Diffstat (limited to 'src/ghdldrv')
-rw-r--r-- | src/ghdldrv/ghdlsimul.adb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb index 259a3dc57..fd1a13c5a 100644 --- a/src/ghdldrv/ghdlsimul.adb +++ b/src/ghdldrv/ghdlsimul.adb @@ -65,6 +65,7 @@ package body Ghdlsimul is -- The design is always analyzed in whole. Flags.Flag_Whole_Analyze := True; Vhdl.Canon.Canon_Flag_Add_Labels := True; + Vhdl.Canon.Canon_Flag_Add_Suspend_State := True; Vhdl.Annotations.Flag_Synthesis := True; |