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| author | Tristan Gingold <tgingold@free.fr> | 2014-12-05 06:12:55 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2014-12-05 06:12:55 +0100 |
| commit | abe17103c669922a7349a7b2238d440b24d29f30 (patch) | |
| tree | ce13055f6740177680c3f258a7414a12a67a26d6 /src/grt/grt-fst.adb | |
| parent | 4a615ab10f0f85b42613c7a4cf168ee4755ca7eb (diff) | |
| download | ghdl-abe17103c669922a7349a7b2238d440b24d29f30.tar.gz ghdl-abe17103c669922a7349a7b2238d440b24d29f30.tar.bz2 ghdl-abe17103c669922a7349a7b2238d440b24d29f30.zip | |
grt-fst: add comments.
Diffstat (limited to 'src/grt/grt-fst.adb')
| -rw-r--r-- | src/grt/grt-fst.adb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/grt/grt-fst.adb b/src/grt/grt-fst.adb index 0c3328580..a44a2630d 100644 --- a/src/grt/grt-fst.adb +++ b/src/grt/grt-fst.adb @@ -317,6 +317,7 @@ package body Grt.Fst is Type_C_Name := To_Ghdl_C_String (Type_Name'Address); end if; + -- Extract name (avoid truncation, append verilog range for arrays). Vhpi_Get_Str (VhpiNameP, Sig, Name, Name_Len); if Name_Len >= Name'Length or else Vcd_El.Irange /= null @@ -362,6 +363,7 @@ package body Grt.Fst is Alias, Type_C_Name, FST_SVT_VHDL_SIGNAL, Sdt); end if; + -- Do not put aliases in the table. if Flag_Aliases and then Interfaces.C."/=" (Alias, Null_fstHandle) then return; end if; |