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author | Tristan Gingold <tgingold@free.fr> | 2015-01-10 21:51:16 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2015-01-10 21:51:16 +0100 |
commit | 4fdd3fe4b523e8c480426741d1065352edd48792 (patch) | |
tree | 3a147cbd201792f90615bfd13d031bfdc9a2b139 /src/grt | |
parent | 5f674701bcfe000eb9795c6d4704c2c56ceeb06c (diff) | |
download | ghdl-4fdd3fe4b523e8c480426741d1065352edd48792.tar.gz ghdl-4fdd3fe4b523e8c480426741d1065352edd48792.tar.bz2 ghdl-4fdd3fe4b523e8c480426741d1065352edd48792.zip |
Initialize direct driver value.
Diffstat (limited to 'src/grt')
-rw-r--r-- | src/grt/grt-signals.adb | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/grt/grt-signals.adb b/src/grt/grt-signals.adb index 2ec5aa2bf..ac78761c8 100644 --- a/src/grt/grt-signals.adb +++ b/src/grt/grt-signals.adb @@ -68,6 +68,25 @@ package body Grt.Signals is return Sig_Mode; end Get_Current_Mode_Signal; + procedure Assign + (Targ : out Value_Union; Val : Value_Union; Mode : Mode_Type) is + begin + case Mode is + when Mode_B1 => + Targ.B1 := Val.B1; + when Mode_E8 => + Targ.E8 := Val.E8; + when Mode_E32 => + Targ.E32 := Val.E32; + when Mode_I32 => + Targ.I32 := Val.I32; + when Mode_I64 => + Targ.I64 := Val.I64; + when Mode_F64 => + Targ.F64 := Val.F64; + end case; + end Assign; + procedure Ghdl_Signal_Name_Rti (Sig : Ghdl_Rti_Access; Ctxt : Ghdl_Rti_Access; Addr : Address) @@ -361,6 +380,9 @@ package body Grt.Signals is Val_Ptr => Drv); Sign.S.Drivers (Sign.S.Nbr_Drivers - 1).Last_Trans := Trans1; Trans.Next := Trans1; + + -- Initialize driver value. + Assign (Drv.all, Sign.Value, Sign.Mode); end Ghdl_Signal_Add_Direct_Driver; procedure Append_Port (Targ : Ghdl_Signal_Ptr; Src : Ghdl_Signal_Ptr) |