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authorTristan Gingold <tgingold@free.fr>2019-02-23 07:27:47 +0100
committerTristan Gingold <tgingold@free.fr>2019-02-23 07:27:47 +0100
commitad37a1484212c80764ba3101f07e1d995fd11ad4 (patch)
tree01cdd62589715c43b233407f5419aa35e7020123 /src/grt
parentbf7412a68ed3520b62df8561882cc976c9340011 (diff)
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Partial revert of #753.
Diffstat (limited to 'src/grt')
-rw-r--r--src/grt/grt-vpi.adb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/grt/grt-vpi.adb b/src/grt/grt-vpi.adb
index 4e512a01c..331694a34 100644
--- a/src/grt/grt-vpi.adb
+++ b/src/grt/grt-vpi.adb
@@ -544,7 +544,7 @@ package body Grt.Vpi is
begin
Get_Verilog_Wire (Res, Info);
if Info.Vtype /= Vcd_Bad then
- return vpiPort;
+ return vpiNet;
end if;
end;
when VhpiSigDeclK =>