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authorTristan Gingold <tgingold@free.fr>2020-02-23 08:43:38 +0100
committerTristan Gingold <tgingold@free.fr>2020-02-23 08:43:38 +0100
commitc121783be11334acd9226ef3962f5595c72e59d8 (patch)
treeb05dff87adbda6f71eabcb618bf3f32577fe38cd /src/ortho/llvm-nodebug
parent536b6b43951f42ce3a7b80d58467ce816d6850d4 (diff)
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testsuite/synth: add tests for memory ports order.
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