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author | Tristan Gingold <tgingold@free.fr> | 2022-09-14 21:03:17 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2022-09-15 01:48:27 +0200 |
commit | d04a3a95da9d74d8130c20c2f6947fc64b8768a8 (patch) | |
tree | bfa6d99e0ce10cd10890b7a477a47befc9caa177 /src/ortho/mcode | |
parent | 020e7d55e49116f5bed02a7913823cd09770a1f2 (diff) | |
download | ghdl-d04a3a95da9d74d8130c20c2f6947fc64b8768a8.tar.gz ghdl-d04a3a95da9d74d8130c20c2f6947fc64b8768a8.tar.bz2 ghdl-d04a3a95da9d74d8130c20c2f6947fc64b8768a8.zip |
ortho/mcode: add reg move for ret. Fix #2189
Diffstat (limited to 'src/ortho/mcode')
-rw-r--r-- | src/ortho/mcode/ortho_code-x86-emits.adb | 2 | ||||
-rw-r--r-- | src/ortho/mcode/ortho_code-x86-insns.adb | 22 |
2 files changed, 17 insertions, 7 deletions
diff --git a/src/ortho/mcode/ortho_code-x86-emits.adb b/src/ortho/mcode/ortho_code-x86-emits.adb index 725dfd80b..b33a5d019 100644 --- a/src/ortho/mcode/ortho_code-x86-emits.adb +++ b/src/ortho/mcode/ortho_code-x86-emits.adb @@ -2739,6 +2739,8 @@ package body Ortho_Code.X86.Emits is and then Op_Reg in Regs_R64 then Emit_Tst (Op_Reg, Sz_8); + elsif Reg in Regs_R64 and then Op_Reg in Regs_R64 then + Emit_Move (Operand, Sz_Ptr, Reg); else Error_Emit ("emit_insn: move/b2", Stmt); end if; diff --git a/src/ortho/mcode/ortho_code-x86-insns.adb b/src/ortho/mcode/ortho_code-x86-insns.adb index 9d990c465..a9d59c557 100644 --- a/src/ortho/mcode/ortho_code-x86-insns.adb +++ b/src/ortho/mcode/ortho_code-x86-insns.adb @@ -2316,7 +2316,6 @@ package body Ortho_Code.X86.Insns is Left : O_Enode; Right : O_Enode; - P_Reg : O_Reg; Num : O_Inum; Prev_Stack_Offset : Uns32; @@ -2374,12 +2373,21 @@ package body Ortho_Code.X86.Insns is Left := Gen_Call (Stmt, R_None, Num); -- Gen_Call already link the statement. Discard the result. when OE_Ret => - Left := Get_Expr_Operand (Stmt); - P_Reg := Get_Return_Register (Get_Expr_Mode (Stmt)); - Left := Gen_Insn (Left, P_Reg, Num); - Set_Expr_Operand (Stmt, Left); - Link_Stmt (Stmt); - Free_Insn_Regs (Left); + declare + R_Reg : O_Reg; + P_Reg : O_Reg; + begin + Left := Get_Expr_Operand (Stmt); + P_Reg := Get_Return_Register (Get_Expr_Mode (Stmt)); + Left := Gen_Insn (Left, P_Reg, Num); + Free_Insn_Regs (Left); + R_Reg := Get_Expr_Reg (Left); + if R_Reg /= P_Reg then + Left := Insert_Move (Left, P_Reg); + end if; + Set_Expr_Operand (Stmt, Left); + Link_Stmt (Stmt); + end; when OE_Case => Left := Gen_Insn (Get_Expr_Operand (Stmt), Get_Reg_Any (Stmt), Num); |