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| author | Tristan Gingold <tgingold@free.fr> | 2022-08-23 06:19:17 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-08-23 06:19:17 +0200 |
| commit | 9d41b070c29508d5c941566b5687673a2e182578 (patch) | |
| tree | 04f0902bce6031e5a3970d5692669ce9b0f8de2c /src/simul/simul-vhdl_elab.ads | |
| parent | 68765b386b7fece1b0fc709846d3f8bc29b45ecb (diff) | |
| download | ghdl-9d41b070c29508d5c941566b5687673a2e182578.tar.gz ghdl-9d41b070c29508d5c941566b5687673a2e182578.tar.bz2 ghdl-9d41b070c29508d5c941566b5687673a2e182578.zip | |
simul: add extra drivers for ports without sources
Diffstat (limited to 'src/simul/simul-vhdl_elab.ads')
| -rw-r--r-- | src/simul/simul-vhdl_elab.ads | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/simul/simul-vhdl_elab.ads b/src/simul/simul-vhdl_elab.ads index c17555920..0fb790475 100644 --- a/src/simul/simul-vhdl_elab.ads +++ b/src/simul/simul-vhdl_elab.ads @@ -122,6 +122,16 @@ package Simul.Vhdl_Elab is -- Signals. + -- Number of drivers and out connections for each scalar element. + type Nbr_Sources_Type is record + Nbr_Drivers : Uns32; + Nbr_Conns : Uns32; + Last_Proc : Process_Index_Type; + end record; + + type Nbr_Sources_Array is array (Uns32 range <>) of Nbr_Sources_Type; + type Nbr_Sources_Arr_Acc is access Nbr_Sources_Array; + type Signal_Entry (Kind : Mode_Signal_Type := Mode_Signal) is record Decl : Iir; Inst : Synth_Instance_Acc; @@ -139,6 +149,7 @@ package Simul.Vhdl_Elab is when Mode_Signal_User => Drivers : Driver_Index_Type; Connect : Connect_Index_Type; + Nbr_Sources : Nbr_Sources_Arr_Acc; when Mode_Quiet | Mode_Stable | Mode_Delayed | Mode_Transaction => Time : Std_Time; |