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| author | Tristan Gingold <tgingold@free.fr> | 2020-04-15 07:35:24 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-04-15 07:36:01 +0200 |
| commit | 15539c0af43cc63d99239e3b65d936955cde3226 (patch) | |
| tree | 97e95dcd9f260a3a7acf2cf48dde556416a65ecd /src/synth/ghdlsynth_gates.h | |
| parent | add25cf10b6886bfea9b2392e08142cee1698fd0 (diff) | |
| download | ghdl-15539c0af43cc63d99239e3b65d936955cde3226.tar.gz ghdl-15539c0af43cc63d99239e3b65d936955cde3226.tar.bz2 ghdl-15539c0af43cc63d99239e3b65d936955cde3226.zip | |
synth: rework edge handling to properly support falling edge. Fix #1227
Diffstat (limited to 'src/synth/ghdlsynth_gates.h')
| -rw-r--r-- | src/synth/ghdlsynth_gates.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/synth/ghdlsynth_gates.h b/src/synth/ghdlsynth_gates.h index fd45445a2..03bd87499 100644 --- a/src/synth/ghdlsynth_gates.h +++ b/src/synth/ghdlsynth_gates.h @@ -81,11 +81,12 @@ enum Module_Id { Id_Mem_Rd_Sync = 77, Id_Mem_Wr_Sync = 78, Id_Mem_Multiport = 79, - Id_Edge = 80, - Id_Assert = 81, - Id_Assume = 82, - Id_Cover = 83, - Id_Assert_Cover = 84, + Id_Posedge = 80, + Id_Negedge = 81, + Id_Assert = 82, + Id_Assume = 83, + Id_Cover = 84, + Id_Assert_Cover = 85, Id_Allconst = 90, Id_Anyconst = 91, Id_Allseq = 92, |