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| author | Tristan Gingold <tgingold@free.fr> | 2019-10-02 18:38:40 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-10-02 18:38:40 +0200 |
| commit | 336dbeaa305bdfe968a500161f561b35a9c495c0 (patch) | |
| tree | 4a56436f5e17ba6fd7b62d4507d3c8a725492767 /src/synth/ghdlsynth_gates.h | |
| parent | bfad2a487e2e6f6476e9417d70dff73656041883 (diff) | |
| download | ghdl-336dbeaa305bdfe968a500161f561b35a9c495c0.tar.gz ghdl-336dbeaa305bdfe968a500161f561b35a9c495c0.tar.bz2 ghdl-336dbeaa305bdfe968a500161f561b35a9c495c0.zip | |
netlists: add memidx1 and memidx2 gates.
Diffstat (limited to 'src/synth/ghdlsynth_gates.h')
| -rw-r--r-- | src/synth/ghdlsynth_gates.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/synth/ghdlsynth_gates.h b/src/synth/ghdlsynth_gates.h index 3f1afd44d..f8310ec9c 100644 --- a/src/synth/ghdlsynth_gates.h +++ b/src/synth/ghdlsynth_gates.h @@ -61,10 +61,12 @@ enum Module_Id { Id_Extract = 68, Id_Dyn_Extract = 69, Id_Dyn_Insert = 70, - Id_Edge = 71, - Id_Assert = 72, - Id_Assume = 73, - Id_Cover = 74, + Id_Memidx1 = 71, + Id_Memidx2 = 72, + Id_Edge = 80, + Id_Assert = 81, + Id_Assume = 82, + Id_Cover = 83, Id_Const_UB32 = 96, Id_Const_SB32 = 97, Id_Const_UL32 = 98, |