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| author | Tristan Gingold <tgingold@free.fr> | 2020-02-23 08:40:53 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-02-23 08:40:53 +0100 |
| commit | 536b6b43951f42ce3a7b80d58467ce816d6850d4 (patch) | |
| tree | 631d42046eaa3cd243680161bfdef78a629fb75d /src/synth/ghdlsynth_gates.h | |
| parent | 3e544b19d7f3d866587f5da9bfef3bfc430440ca (diff) | |
| download | ghdl-536b6b43951f42ce3a7b80d58467ce816d6850d4.tar.gz ghdl-536b6b43951f42ce3a7b80d58467ce816d6850d4.tar.bz2 ghdl-536b6b43951f42ce3a7b80d58467ce816d6850d4.zip | |
netlists: rework memories to fix port orders, add a loop.
Diffstat (limited to 'src/synth/ghdlsynth_gates.h')
| -rw-r--r-- | src/synth/ghdlsynth_gates.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/synth/ghdlsynth_gates.h b/src/synth/ghdlsynth_gates.h index b215f9793..e7594295b 100644 --- a/src/synth/ghdlsynth_gates.h +++ b/src/synth/ghdlsynth_gates.h @@ -55,6 +55,8 @@ enum Module_Id { Id_Adff = 51, Id_Idff = 52, Id_Iadff = 53, + Id_Mdff = 54, + Id_Midff = 55, Id_Utrunc = 64, Id_Strunc = 65, Id_Uextend = 66, |