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| author | Tristan Gingold <tgingold@free.fr> | 2020-04-22 18:33:28 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-04-22 18:33:28 +0200 |
| commit | 6a5129501daf45e5292349402da81c3bf905db6b (patch) | |
| tree | 60a19ee69b142a2fef038e556cc543d9560f6a01 /src/synth/netlists-disp_vhdl.adb | |
| parent | 4bb12b30a53326ac6e3177bc4016317181dd7f7e (diff) | |
| download | ghdl-6a5129501daf45e5292349402da81c3bf905db6b.tar.gz ghdl-6a5129501daf45e5292349402da81c3bf905db6b.tar.bz2 ghdl-6a5129501daf45e5292349402da81c3bf905db6b.zip | |
netlists: add resolver gate.
Diffstat (limited to 'src/synth/netlists-disp_vhdl.adb')
| -rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 23e1cb782..383d161d6 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -1261,6 +1261,11 @@ package body Netlists.Disp_Vhdl is Disp_Template (" \l0: assert \i0 = '1' severity note; -- assert_cover" & NL, Inst); + when Id_Resolver => + Disp_Template + (" \o0 <= \i0;" & NL, Inst); + Disp_Template + (" \o0 <= \i1;" & NL, Inst); when others => Disp_Instance_Gate (Inst); end case; |