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authorTristan Gingold <tgingold@free.fr>2019-10-30 18:40:25 +0100
committerTristan Gingold <tgingold@free.fr>2019-10-30 18:40:25 +0100
commit098e5e7fcb5863bec25214d1da4d946deb5d8453 (patch)
tree46aa186bd1a25476bd8d247176f6b8f04be9d22e /src/synth/netlists-gates.ads
parent5460489790f0b2934b1b61c8610b798ab7a47d4d (diff)
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netlists: add formal input gates.
Diffstat (limited to 'src/synth/netlists-gates.ads')
-rw-r--r--src/synth/netlists-gates.ads8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads
index ae6c2f58d..69546f479 100644
--- a/src/synth/netlists-gates.ads
+++ b/src/synth/netlists-gates.ads
@@ -210,6 +210,14 @@ package Netlists.Gates is
-- Use to cover the precedent of an assertion.
Id_Assert_Cover : constant Module_Id := 84;
+ -- Formal gates.
+ Id_Allconst : constant Module_Id := 90;
+ Id_Anyconst : constant Module_Id := 91;
+ Id_Allseq : constant Module_Id := 92;
+ Id_Anyseq : constant Module_Id := 93;
+
+ subtype Formal_Module_Id is Module_Id range Id_Allconst .. Id_Anyseq;
+
-- Constants are gates with only one constant output. There are multiple
-- kind of constant gates: for small width, the value is stored as a
-- parameter, possibly signed or unsigned extended.