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| author | Tristan Gingold <tgingold@free.fr> | 2020-03-22 19:36:44 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-03-22 19:36:44 +0100 |
| commit | 0cd37c83c170b5292b5ec9800013da6b4f63c1c1 (patch) | |
| tree | 3b8a1df5451df80e2da3d630eb8621dedbcd1d18 /src/synth/netlists-gates.ads | |
| parent | 902d81ad69bb66a9515d09270c10d0f7ea167d25 (diff) | |
| download | ghdl-0cd37c83c170b5292b5ec9800013da6b4f63c1c1.tar.gz ghdl-0cd37c83c170b5292b5ec9800013da6b4f63c1c1.tar.bz2 ghdl-0cd37c83c170b5292b5ec9800013da6b4f63c1c1.zip | |
synth-disp_vhdl: do not wrap inout ports. For #1166
Diffstat (limited to 'src/synth/netlists-gates.ads')
| -rw-r--r-- | src/synth/netlists-gates.ads | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads index b7577f85c..042091e3c 100644 --- a/src/synth/netlists-gates.ads +++ b/src/synth/netlists-gates.ads @@ -119,6 +119,7 @@ package Netlists.Gates is Id_Output : constant Module_Id := 50; Id_Ioutput : constant Module_Id := 51; Id_Port : constant Module_Id := 52; + Id_Inout : constant Module_Id := 53; -- Note: initial values must be constant nets. -- |