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author | Tristan Gingold <tgingold@free.fr> | 2020-02-19 20:22:01 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-02-20 07:43:46 +0100 |
commit | 50f9ac8e1837cfd888e5449954be9ac3a8eebb79 (patch) | |
tree | 470346277a7c8a9478458d47c1d721f3440f9314 /src/synth/netlists-gates.ads | |
parent | 60a6f13379ed47d33fc6ecdcb314460be33ba46c (diff) | |
download | ghdl-50f9ac8e1837cfd888e5449954be9ac3a8eebb79.tar.gz ghdl-50f9ac8e1837cfd888e5449954be9ac3a8eebb79.tar.bz2 ghdl-50f9ac8e1837cfd888e5449954be9ac3a8eebb79.zip |
netlists: add midff
Diffstat (limited to 'src/synth/netlists-gates.ads')
-rw-r--r-- | src/synth/netlists-gates.ads | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads index 848c7a10f..1816bc8eb 100644 --- a/src/synth/netlists-gates.ads +++ b/src/synth/netlists-gates.ads @@ -158,6 +158,14 @@ package Netlists.Gates is -- Output: 0: Q Id_Mdff : constant Module_Id := 54; + -- Multi clock dff with initial value. ELSE is the output of the next DFF. + -- Inputs: 0: CLK + -- 1: D + -- 2: ELSE + -- 3: Init + -- Output: 0: Q + Id_Midff : constant Module_Id := 55; + -- Width change: truncate or extend. Sign is know in order to possibly -- detect loss of value. Id_Utrunc : constant Module_Id := 64; |