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| author | Tristan Gingold <tgingold@free.fr> | 2019-11-01 18:34:46 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-11-01 18:34:46 +0100 |
| commit | 150a5c6e886cb5a5e5da3194f02481781fba027b (patch) | |
| tree | 1da90345df4f2623cc79685d37e31a4c8a59c667 /src/synth/netlists-memories.adb | |
| parent | d4b148035ddbf84657d18d927a28885c494d5875 (diff) | |
| download | ghdl-150a5c6e886cb5a5e5da3194f02481781fba027b.tar.gz ghdl-150a5c6e886cb5a5e5da3194f02481781fba027b.tar.bz2 ghdl-150a5c6e886cb5a5e5da3194f02481781fba027b.zip | |
netlits: fix memidx order.
Diffstat (limited to 'src/synth/netlists-memories.adb')
| -rw-r--r-- | src/synth/netlists-memories.adb | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/synth/netlists-memories.adb b/src/synth/netlists-memories.adb index 4904e0cec..4163e4878 100644 --- a/src/synth/netlists-memories.adb +++ b/src/synth/netlists-memories.adb @@ -674,11 +674,13 @@ package body Netlists.Memories is end if; -- Merge id_dyn_extract. + -- The order for Addix is important: from larger steps + -- to smaller ones. Disconnect (Get_Input (Inst, 0)); Connect (Get_Input (Inst, 0), Get_Input_Net (Data, 0)); Disconnect (Get_Input (Data, 0)); Add := Build_Addidx - (Ctxt, Get_Input_Net (Inst, 1), Get_Input_Net (Data, 1)); + (Ctxt, Get_Input_Net (Data, 1), Get_Input_Net (Inst, 1)); Disconnect (Get_Input (Data, 1)); Disconnect (Get_Input (Inst, 1)); Connect (Get_Input (Inst, 1), Add); |