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authorTristan Gingold <tgingold@free.fr>2020-02-10 07:00:31 +0100
committerTristan Gingold <tgingold@free.fr>2020-02-10 07:00:31 +0100
commit8f4dda3ded16f2604c070736cbde8849774755a8 (patch)
treef4f59e0760faf79d9d9f7a625991df655599c8bc /src/synth/netlists-memories.ads
parent0f7aa39d2c423b27519b541ae04648d5b3277ffd (diff)
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synth: rework (again) memory inference.
Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference.
Diffstat (limited to 'src/synth/netlists-memories.ads')
-rw-r--r--src/synth/netlists-memories.ads7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/synth/netlists-memories.ads b/src/synth/netlists-memories.ads
index b6b487bf7..8d5e7739e 100644
--- a/src/synth/netlists-memories.ads
+++ b/src/synth/netlists-memories.ads
@@ -27,4 +27,11 @@ package Netlists.Memories is
-- Count the number of memidx in a memory address.
function Count_Memidx (Addr : Net) return Natural;
+ -- True iff a RAM can be infered from VAL (the input of an assignment).
+ -- TODO: handle partial write (offset)
+ -- TODO: directly check with assignment target.
+ function Can_Infere_RAM (Val : Net; Prev_Val : Net) return Boolean;
+
+ -- Transform VAL to a RAM.
+ function Infere_RAM (Ctxt : Context_Acc; Val : Net) return Net;
end Netlists.Memories;