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authorTristan Gingold <tgingold@free.fr>2020-05-02 08:01:22 +0200
committerTristan Gingold <tgingold@free.fr>2020-05-02 08:01:22 +0200
commit8c2dc4b2082ec2bf6f28f44218521f4fbe9bf9d7 (patch)
tree8f84001aef5120c9dafbc5cc4ec54694e44a357b /src/synth/synth-context.ads
parentaeb47655ddfed9d3fd85c4986d21a60f83b9a8c6 (diff)
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synth-context: remove unused bit0/bit1 nets.
Diffstat (limited to 'src/synth/synth-context.ads')
-rw-r--r--src/synth/synth-context.ads8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/synth/synth-context.ads b/src/synth/synth-context.ads
index ca15a6c66..6196257b8 100644
--- a/src/synth/synth-context.ads
+++ b/src/synth/synth-context.ads
@@ -80,12 +80,6 @@ package Synth.Context is
function Get_Instance_Module (Inst : Synth_Instance_Acc) return Module;
pragma Inline (Get_Instance_Module);
- -- Each base instance creates bit0 and bit1, which are used for control
- -- flow.
- function Get_Inst_Bit0 (Inst : Synth_Instance_Acc) return Net;
- function Get_Inst_Bit1 (Inst : Synth_Instance_Acc) return Net;
- pragma Inline (Get_Inst_Bit0, Get_Inst_Bit1);
-
-- Start the definition of module M (using INST).
procedure Set_Instance_Module (Inst : Synth_Instance_Acc; M : Module);
@@ -172,8 +166,6 @@ private
Top_Module : Module;
Cur_Module : Module;
- Bit0 : Net;
- Bit1 : Net;
end record;
type Base_Instance_Acc is access Base_Instance_Type;