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author | Tristan Gingold <tgingold@free.fr> | 2021-01-13 18:20:52 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-01-13 18:55:30 +0100 |
commit | 2fb32502d2a12ac78cc3f5fb4068104b66018ea5 (patch) | |
tree | 268ee539a8a7ba8362ecc1a896a488f1f2e13f28 /src/synth/synth-decls.adb | |
parent | b510f0ea03bc88cbf375ce13c29e97941b561a72 (diff) | |
download | ghdl-2fb32502d2a12ac78cc3f5fb4068104b66018ea5.tar.gz ghdl-2fb32502d2a12ac78cc3f5fb4068104b66018ea5.tar.bz2 ghdl-2fb32502d2a12ac78cc3f5fb4068104b66018ea5.zip |
synth: always finalize declarations. Fix #1591
Diffstat (limited to 'src/synth/synth-decls.adb')
-rw-r--r-- | src/synth/synth-decls.adb | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/src/synth/synth-decls.adb b/src/synth/synth-decls.adb index 9fabb7a49..047eac454 100644 --- a/src/synth/synth-decls.adb +++ b/src/synth/synth-decls.adb @@ -1094,14 +1094,24 @@ package body Synth.Decls is pragma Assert (Is_Error (Syn_Inst)); return; end if; + if Vt.Val.Kind = Value_Net then + -- Could be a net for in ports. + return; + end if; + + Finalize_Assignment (Get_Build (Syn_Inst), Vt.Val.W); Gate_Net := Get_Wire_Gate (Vt.Val.W); Gate := Get_Net_Parent (Gate_Net); case Get_Id (Gate) is - when Id_Signal => + when Id_Signal + | Id_Output + | Id_Inout => Drv := Get_Input_Net (Gate, 0); Def_Val := No_Net; - when Id_Isignal => + when Id_Isignal + | Id_Ioutput + | Id_Iinout => Drv := Get_Input_Net (Gate, 0); Def_Val := Get_Input_Net (Gate, 1); when others => @@ -1140,14 +1150,18 @@ package body Synth.Decls is declare Vt : constant Valtyp := Get_Value (Syn_Inst, Decl); begin - if Vt /= No_Valtyp then + if Vt /= No_Valtyp + and then Vt.Val.Kind = Value_Wire + then + Finalize_Assignment (Get_Build (Syn_Inst), Vt.Val.W); Free_Wire (Vt.Val.W); end if; end; end if; when Iir_Kind_Constant_Declaration => null; - when Iir_Kind_Signal_Declaration => + when Iir_Kind_Signal_Declaration + | Iir_Kind_Interface_Signal_Declaration => pragma Assert (not Is_Subprg); Finalize_Signal (Syn_Inst, Decl); when Iir_Kind_Anonymous_Signal_Declaration => |