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authorTristan Gingold <tgingold@free.fr>2020-05-07 20:48:24 +0200
committerTristan Gingold <tgingold@free.fr>2020-05-07 20:48:24 +0200
commitcbca4e13e4c045aa4135a5375165d68ba527b63f (patch)
tree851b4c09bda99636b0098a4304e98596db78939c /src/synth/synth-decls.adb
parent0ed7faecf056394561daaeb67250a4177f1829e6 (diff)
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synth: handle vhdl-08 ports. Fix ghdl/ghdl-yosys-plugin#111
Diffstat (limited to 'src/synth/synth-decls.adb')
-rw-r--r--src/synth/synth-decls.adb21
1 files changed, 12 insertions, 9 deletions
diff --git a/src/synth/synth-decls.adb b/src/synth/synth-decls.adb
index 378921c45..0e4674b01 100644
--- a/src/synth/synth-decls.adb
+++ b/src/synth/synth-decls.adb
@@ -290,6 +290,16 @@ package body Synth.Decls is
end case;
end Synth_Float_Range_Constraint;
+ function Has_Element_Subtype_Indication (Atype : Node) return Boolean is
+ begin
+ return Get_Array_Element_Constraint (Atype) /= Null_Node
+ or else
+ (Get_Resolution_Indication (Atype) /= Null_Node
+ and then
+ (Get_Kind (Get_Resolution_Indication (Atype))
+ = Iir_Kind_Array_Element_Resolution));
+ end Has_Element_Subtype_Indication;
+
function Synth_Array_Subtype_Indication
(Syn_Inst : Synth_Instance_Acc; Atype : Node) return Type_Acc
is
@@ -302,13 +312,7 @@ package body Synth.Decls is
Bnds : Bound_Array_Acc;
begin
-- VHDL08
- if Get_Array_Element_Constraint (Atype) /= Null_Node
- or else
- (Get_Resolution_Indication (Atype) /= Null_Node
- and then
- (Get_Kind (Get_Resolution_Indication (Atype))
- = Iir_Kind_Array_Element_Resolution))
- then
+ if Has_Element_Subtype_Indication (Atype) then
-- This subtype has created a new anonymous subtype for the
-- element.
Synth_Subtype_Indication (Syn_Inst, El_Type);
@@ -383,8 +387,7 @@ package body Synth.Decls is
Rng := Synth_Discrete_Range_Constraint
(Syn_Inst, Get_Range_Constraint (Atype));
W := Discrete_Range_Width (Rng);
- return
- Create_Discrete_Type (Rng, Btype.Sz, W);
+ return Create_Discrete_Type (Rng, Btype.Sz, W);
end if;
end;
when Iir_Kind_Floating_Subtype_Definition =>