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| author | Tristan Gingold <tgingold@free.fr> | 2019-10-07 18:39:12 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-10-07 18:39:12 +0200 |
| commit | b5d63b3ebcddbda84f797281c833e695f2629c49 (patch) | |
| tree | c68e1a205ab06f2194450c2c907c9da856f4863f /src/synth/synth-disp_vhdl.adb | |
| parent | c20a77ebfc92d14c6f0af4b963ec560da8e8dc93 (diff) | |
| download | ghdl-b5d63b3ebcddbda84f797281c833e695f2629c49.tar.gz ghdl-b5d63b3ebcddbda84f797281c833e695f2629c49.tar.bz2 ghdl-b5d63b3ebcddbda84f797281c833e695f2629c49.zip | |
synth-disp_vhdl: handle enum of width 1 for
Diffstat (limited to 'src/synth/synth-disp_vhdl.adb')
| -rw-r--r-- | src/synth/synth-disp_vhdl.adb | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/synth/synth-disp_vhdl.adb b/src/synth/synth-disp_vhdl.adb index 0ea78fc26..d2e83fb6d 100644 --- a/src/synth/synth-disp_vhdl.adb +++ b/src/synth/synth-disp_vhdl.adb @@ -100,7 +100,6 @@ package body Synth.Disp_Vhdl is Put_Line (Pfx & ";"); else -- Any other enum. - -- TODO: width = 1 W := Typ.W; Disp_In_Lhs (Mname, Off, W, Full); if W = 1 then @@ -233,7 +232,12 @@ package body Synth.Disp_Vhdl is W := Typ.W; Put (Name_Table.Image (Get_Identifier (Get_Type_Declarator (Ptype)))); - Put ("'val (to_integer(unsigned("); + Put ("'val (to_integer(unsigned"); + if W = 1 then + Put ("'(0 => "); + else + Put ('('); + end if; Disp_Out_Rhs (Mname, Off, W, Full); Put_Line (")));"); end if; |