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authorTristan Gingold <tgingold@free.fr>2021-04-16 06:44:05 +0200
committerTristan Gingold <tgingold@free.fr>2021-04-16 06:58:03 +0200
commit33b307ba8d64ae952334a7f79249178141adee2c (patch)
treeee312a4da3b39946d935f8ebf0cf8c722d8073bb /src/synth/synth-expr.adb
parenta677e3cc38d1f5e3813bc1e5bd424ee0b59319ed (diff)
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synth: refactoring (synth.aggr -> synth.vhdl_aggr)
Diffstat (limited to 'src/synth/synth-expr.adb')
-rw-r--r--src/synth/synth-expr.adb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index 15b9914f0..437318257 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -46,7 +46,7 @@ with Synth.Stmts; use Synth.Stmts;
with Synth.Oper; use Synth.Oper;
with Synth.Heap; use Synth.Heap;
with Synth.Debugger;
-with Synth.Aggr;
+with Synth.Vhdl_Aggr;
with Grt.Types;
with Grt.To_Strings;
@@ -2395,7 +2395,7 @@ package body Synth.Expr is
end case;
end;
when Iir_Kind_Aggregate =>
- return Synth.Aggr.Synth_Aggregate (Syn_Inst, Expr, Expr_Type);
+ return Synth.Vhdl_Aggr.Synth_Aggregate (Syn_Inst, Expr, Expr_Type);
when Iir_Kind_Simple_Aggregate =>
return Synth_Simple_Aggregate (Syn_Inst, Expr);
when Iir_Kind_Parenthesis_Expression =>