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author | Tristan Gingold <tgingold@free.fr> | 2019-11-28 06:26:08 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-11-28 06:26:08 +0100 |
commit | 45fd84fcfce9e949223f9e8c537ebb7bb6f2699c (patch) | |
tree | b6fc8613956a952b6223ffecb7cfcfd45c97d732 /src/synth/synth-expr.ads | |
parent | 51844caf9dbb8efd6a86a12ed21ec3dc17a3b537 (diff) | |
download | ghdl-45fd84fcfce9e949223f9e8c537ebb7bb6f2699c.tar.gz ghdl-45fd84fcfce9e949223f9e8c537ebb7bb6f2699c.tar.bz2 ghdl-45fd84fcfce9e949223f9e8c537ebb7bb6f2699c.zip |
synth: factorize code, move value2logvec to synth-expr.
Fix #1036
Diffstat (limited to 'src/synth/synth-expr.ads')
-rw-r--r-- | src/synth/synth-expr.ads | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/synth/synth-expr.ads b/src/synth/synth-expr.ads index 5d8d7f7d5..8fdf5a89c 100644 --- a/src/synth/synth-expr.ads +++ b/src/synth/synth-expr.ads @@ -18,6 +18,8 @@ -- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, -- MA 02110-1301, USA. +with Ada.Unchecked_Deallocation; + with Types; use Types; with Netlists; use Netlists; @@ -110,4 +112,23 @@ package Synth.Expr is Voff : out Net; Off : out Uns32; W : out Width); + + -- Conversion to logic vector. + + type Logic_32 is record + Val : Uns32; -- AKA aval + Zx : Uns32; -- AKA bval + end record; + + type Digit_Index is new Natural; + type Logvec_Array is array (Digit_Index range <>) of Logic_32; + type Logvec_Array_Acc is access Logvec_Array; + + procedure Free_Logvec_Array is new Ada.Unchecked_Deallocation + (Logvec_Array, Logvec_Array_Acc); + + procedure Value2logvec (Val : Value_Acc; + Vec : in out Logvec_Array; + Off : in out Uns32; + Has_Zx : in out Boolean); end Synth.Expr; |