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| author | Tristan Gingold <tgingold@free.fr> | 2020-03-31 07:34:25 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2020-03-31 18:29:05 +0200 |
| commit | d8afbddcf37ea68a19b6edfa4820ef3bdd0c5076 (patch) | |
| tree | b51452cd7023564f5500c8b61a26c568dead732f /src/synth/synth-expr.ads | |
| parent | 5aa87ef99e4f5ba046d215ac6d99a645ce7a0e1d (diff) | |
| download | ghdl-d8afbddcf37ea68a19b6edfa4820ef3bdd0c5076.tar.gz ghdl-d8afbddcf37ea68a19b6edfa4820ef3bdd0c5076.tar.bz2 ghdl-d8afbddcf37ea68a19b6edfa4820ef3bdd0c5076.zip | |
synth: preliminary work to export module parameters.
Diffstat (limited to 'src/synth/synth-expr.ads')
| -rw-r--r-- | src/synth/synth-expr.ads | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/synth/synth-expr.ads b/src/synth/synth-expr.ads index 66c1104c2..ed419ab76 100644 --- a/src/synth/synth-expr.ads +++ b/src/synth/synth-expr.ads @@ -122,11 +122,6 @@ package Synth.Expr is -- Conversion to logic vector. - type Logic_32 is record - Val : Uns32; -- AKA aval - Zx : Uns32; -- AKA bval (z=10, x=11) - end record; - type Digit_Index is new Natural; type Logvec_Array is array (Digit_Index range <>) of Logic_32; type Logvec_Array_Acc is access Logvec_Array; |