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author | Tristan Gingold <tgingold@free.fr> | 2019-11-16 13:37:38 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-11-16 13:37:38 +0100 |
commit | f77e7c4e9dff80f8c478851b826e45f13a13cfe0 (patch) | |
tree | c85451678862e76ec67e24cc0f9690cfbb89523f /src/synth/synth-ieee-std_logic_1164.ads | |
parent | f1046168bd29e08372159d99768ce9e8a014f61a (diff) | |
download | ghdl-f77e7c4e9dff80f8c478851b826e45f13a13cfe0.tar.gz ghdl-f77e7c4e9dff80f8c478851b826e45f13a13cfe0.tar.bz2 ghdl-f77e7c4e9dff80f8c478851b826e45f13a13cfe0.zip |
synth: handle static mul sgn sgn.
Diffstat (limited to 'src/synth/synth-ieee-std_logic_1164.ads')
-rw-r--r-- | src/synth/synth-ieee-std_logic_1164.ads | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/synth/synth-ieee-std_logic_1164.ads b/src/synth/synth-ieee-std_logic_1164.ads index 242a417fb..433825e86 100644 --- a/src/synth/synth-ieee-std_logic_1164.ads +++ b/src/synth/synth-ieee-std_logic_1164.ads @@ -38,7 +38,7 @@ package Synth.Ieee.Std_Logic_1164 is -- Vector of logic state. type Std_Logic_Vector is array (Natural range <>) of Std_Ulogic; - -- type Table_1d is array (Std_Ulogic) of Std_Ulogic; + type Table_1d is array (Std_Ulogic) of Std_Ulogic; type Table_2d is array (Std_Ulogic, Std_Ulogic) of Std_Ulogic; And_Table : constant Table_2d := @@ -79,4 +79,9 @@ package Synth.Ieee.Std_Logic_1164 is "UX10XX10X", -- H "UXXXXXXXX" -- - ); + + Not_Table : constant Table_1d := + -- UX01ZWLH- + "UX10XX10X"; + end Synth.Ieee.Std_Logic_1164; |