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author | Tristan Gingold <tgingold@free.fr> | 2019-09-24 20:15:54 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-09-25 06:59:31 +0200 |
commit | 010aca1966eeb260529041d209d69a92654465f8 (patch) | |
tree | c6ee61df644a096924bcdbe1de0f4dd325dcd4b0 /src/synth/synth-insts.adb | |
parent | ce6232cf23bf794e5b8df88a5e7c0eed5408b3e0 (diff) | |
download | ghdl-010aca1966eeb260529041d209d69a92654465f8.tar.gz ghdl-010aca1966eeb260529041d209d69a92654465f8.tar.bz2 ghdl-010aca1966eeb260529041d209d69a92654465f8.zip |
synth: rework type for expression.
Diffstat (limited to 'src/synth/synth-insts.adb')
-rw-r--r-- | src/synth/synth-insts.adb | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb index 275efcfeb..11d890c42 100644 --- a/src/synth/synth-insts.adb +++ b/src/synth/synth-insts.adb @@ -447,6 +447,7 @@ package body Synth.Insts is Assoc_Inter : Node; Actual : Node; Inter : Node; + Inter_Type : Type_Acc; begin Assoc := Get_Port_Map_Aspect_Chain (Stmt); Assoc_Inter := Get_Port_Chain (Component); @@ -465,10 +466,11 @@ package body Synth.Insts is Synth_Declaration_Type (Comp_Inst, Inter); case Mode_To_Port_Kind (Get_Mode (Inter)) is when Port_In => - Create_Object - (Comp_Inst, Assoc_Inter, - Synth_Expression_With_Type - (Syn_Inst, Actual, Get_Type (Assoc_Inter))); + Inter_Type := + Get_Value_Type (Comp_Inst, Get_Type (Assoc_Inter)); + Create_Object (Comp_Inst, Assoc_Inter, + Synth_Expression_With_Type + (Syn_Inst, Actual, Inter_Type)); when Port_Out | Port_Inout => Make_Object (Comp_Inst, Wire_None, Assoc_Inter); @@ -590,9 +592,11 @@ package body Synth.Insts is Synth_Declaration_Type (Syn_Inst, Inter); declare Val : Value_Acc; + Inter_Type : Type_Acc; begin + Inter_Type := Get_Value_Type (Syn_Inst, Get_Type (Inter)); Val := Synth_Expression_With_Type - (Syn_Inst, Get_Default_Value (Inter), Get_Type (Inter)); + (Syn_Inst, Get_Default_Value (Inter), Inter_Type); Create_Object (Syn_Inst, Inter, Val); end; Inter := Get_Chain (Inter); |