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author | Tristan Gingold <tgingold@free.fr> | 2019-09-21 09:01:33 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-09-21 09:01:33 +0200 |
commit | 9dc242a89475b2de486859988cf10fc7d57cf698 (patch) | |
tree | c544cd7195db8b0605588c27f09e7e49eeb6228f /src/synth/synth-insts.adb | |
parent | 098715670d1069444f186b3974255ca5778e727f (diff) | |
download | ghdl-9dc242a89475b2de486859988cf10fc7d57cf698.tar.gz ghdl-9dc242a89475b2de486859988cf10fc7d57cf698.tar.bz2 ghdl-9dc242a89475b2de486859988cf10fc7d57cf698.zip |
synth-insts: remove useless function.
Diffstat (limited to 'src/synth/synth-insts.adb')
-rw-r--r-- | src/synth/synth-insts.adb | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/src/synth/synth-insts.adb b/src/synth/synth-insts.adb index 2d2b239f3..b73ca6ac8 100644 --- a/src/synth/synth-insts.adb +++ b/src/synth/synth-insts.adb @@ -56,16 +56,6 @@ package body Synth.Insts is end case; end Mode_To_Port_Kind; - function Get_Nbr_Wire (Val : Value_Acc) return Uns32 is - begin - case Val.Kind is - when Value_Wire => - return 1; - when others => - raise Internal_Error; -- TODO - end case; - end Get_Nbr_Wire; - procedure Make_Port_Desc (Val : Value_Acc; Name : Sname; Ports : in out Port_Desc_Array; @@ -161,7 +151,6 @@ package body Synth.Insts is Inter_Type : Node; Nbr_Inputs : Port_Nbr; Nbr_Outputs : Port_Nbr; - Num : Uns32; Cur_Module : Module; begin if Get_Kind (Params.Decl) = Iir_Kind_Component_Declaration then @@ -207,13 +196,11 @@ package body Synth.Insts is case Mode_To_Port_Kind (Get_Mode (Inter)) is when Port_In => Make_Object (Syn_Inst, Wire_None, Inter); - Num := Get_Nbr_Wire (Get_Value (Syn_Inst, Inter)); - Nbr_Inputs := Nbr_Inputs + Port_Nbr (Num); + Nbr_Inputs := Nbr_Inputs + 1; when Port_Out | Port_Inout => Make_Object (Syn_Inst, Wire_None, Inter); - Num := Get_Nbr_Wire (Get_Value (Syn_Inst, Inter)); - Nbr_Outputs := Nbr_Outputs + Port_Nbr (Num); + Nbr_Outputs := Nbr_Outputs + 1; end case; Inter := Get_Chain (Inter); end loop; |