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author | Tristan Gingold <tgingold@free.fr> | 2020-05-16 21:46:05 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-05-16 21:46:05 +0200 |
commit | 2c74d2994ce3bd1c714cacf829845e436160943d (patch) | |
tree | 8559feba5a1baa6d98364d698834fff16ef318ea /src/synth/synth-static_oper.adb | |
parent | 5a498b26f5fef355533f482aba3978fd8ca16464 (diff) | |
download | ghdl-2c74d2994ce3bd1c714cacf829845e436160943d.tar.gz ghdl-2c74d2994ce3bd1c714cacf829845e436160943d.tar.bz2 ghdl-2c74d2994ce3bd1c714cacf829845e436160943d.zip |
synth-ieee-numeric_std: also use memtyp for negation.
Diffstat (limited to 'src/synth/synth-static_oper.adb')
-rw-r--r-- | src/synth/synth-static_oper.adb | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index 440df4c0a..ecfc0db80 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -984,17 +984,7 @@ package body Synth.Static_Oper is end; when Iir_Predefined_Ieee_Numeric_Std_Neg_Sgn => - declare - Op_Arr : Std_Logic_Vector - (1 .. Natural (Vec_Length (Operand.Typ))); - begin - To_Std_Logic_Vector (Operand, Op_Arr); - declare - Res_Arr : constant Std_Logic_Vector := Neg_Sgn (Op_Arr); - begin - return To_Memtyp (Res_Arr, Operand.Typ.Vec_El); - end; - end; + return Neg_Vec (Operand, Expr); when Iir_Predefined_Ieee_1164_Vector_Not | Iir_Predefined_Ieee_Numeric_Std_Not_Uns |