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authorTristan Gingold <tgingold@free.fr>2022-09-17 11:52:42 +0200
committerTristan Gingold <tgingold@free.fr>2022-09-17 11:52:42 +0200
commit5d95674685a4a5c557757cc51c61b0fb6ec8fd18 (patch)
tree724d6bd8bb0f5a7e119cea4d1f93658499283ed6 /src/synth/synth-vhdl_eval.adb
parent7548e438616dfc9fcfd05d1df8d6b4d88796e279 (diff)
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synth: improve file handling (skip extra data, errors)
Diffstat (limited to 'src/synth/synth-vhdl_eval.adb')
-rw-r--r--src/synth/synth-vhdl_eval.adb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb
index cddcc5a5d..1ca559dec 100644
--- a/src/synth/synth-vhdl_eval.adb
+++ b/src/synth/synth-vhdl_eval.adb
@@ -2403,6 +2403,9 @@ package body Synth.Vhdl_Eval is
begin
Res := Elab.Vhdl_Files.Endfile (Param1.Val.File, Expr);
return Create_Memory_U8 (Boolean'Pos (Res), Boolean_Type);
+ exception
+ when Elab.Vhdl_Files.File_Execution_Error =>
+ return Null_Memtyp;
end;
when Iir_Predefined_Integer_To_String =>