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| author | Tristan Gingold <tgingold@free.fr> | 2022-04-05 19:14:22 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-04-05 19:14:22 +0200 |
| commit | 9b14c0ac67981ca6db6c6d4861035afca1595965 (patch) | |
| tree | 3f0beea15c714ac20c23d744c1af9cdd1aa7ae77 /src/synth/synth-vhdl_expr.adb | |
| parent | d46c35b74f8b173363d238bf2e23bda7ae595e54 (diff) | |
| download | ghdl-9b14c0ac67981ca6db6c6d4861035afca1595965.tar.gz ghdl-9b14c0ac67981ca6db6c6d4861035afca1595965.tar.bz2 ghdl-9b14c0ac67981ca6db6c6d4861035afca1595965.zip | |
synth: do not add info for element subtype (except for arrays).
Fix #2021
Diffstat (limited to 'src/synth/synth-vhdl_expr.adb')
| -rw-r--r-- | src/synth/synth-vhdl_expr.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb index 834f1de47..0ad0b4420 100644 --- a/src/synth/synth-vhdl_expr.adb +++ b/src/synth/synth-vhdl_expr.adb @@ -1661,6 +1661,7 @@ package body Synth.Vhdl_Expr is (Syn_Inst : Synth_Instance_Acc; Str : Node; Str_Typ : Type_Acc) return Valtyp is + pragma Unreferenced (Syn_Inst); pragma Assert (Get_Kind (Str) = Iir_Kind_String_Literal8); Id : constant String8_Id := Get_String8_Id (Str); @@ -1685,7 +1686,7 @@ package body Synth.Vhdl_Expr is raise Internal_Error; end case; - El_Type := Get_Subtype_Object (Syn_Inst, Get_Element_Subtype (Str_Type)); + El_Type := Get_Array_Element (Str_Typ); if El_Type.Kind in Type_Nets then Res_Type := Create_Vector_Type (Bounds, El_Type); else |