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| author | Tristan Gingold <tgingold@free.fr> | 2022-07-11 07:32:32 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-07-11 07:32:32 +0200 |
| commit | bf107b7674eafed70f22e53f6448db92b0766f56 (patch) | |
| tree | 8a8f8c2ebe36e58f47fcedf4f80a6d9ce80cf45d /src/synth/synth-vhdl_stmts.adb | |
| parent | 493d10f3c362620c24365440de7480b4bf49818e (diff) | |
| download | ghdl-bf107b7674eafed70f22e53f6448db92b0766f56.tar.gz ghdl-bf107b7674eafed70f22e53f6448db92b0766f56.tar.bz2 ghdl-bf107b7674eafed70f22e53f6448db92b0766f56.zip | |
synth-environment: add Loc parameter to Add_Conc_Assign
Diffstat (limited to 'src/synth/synth-vhdl_stmts.adb')
| -rw-r--r-- | src/synth/synth-vhdl_stmts.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index f351c34f3..7d0c0b805 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -3871,7 +3871,7 @@ package body Synth.Vhdl_Stmts is N := Build_Formal_Input (Get_Build (Syn_Inst), Id, Typ.W); Set_Location (N, Val); - Add_Conc_Assign (Get_Value_Wire (Base.Val), N, 0); + Add_Conc_Assign (Get_Value_Wire (Base.Val), N, 0, Get_Location (Val)); end; end Synth_Attribute_Formal; |