diff options
author | Tristan Gingold <tgingold@free.fr> | 2023-01-03 13:53:37 +0100 |
---|---|---|
committer | Tristan Gingold <tgingold@free.fr> | 2023-01-03 16:47:28 +0100 |
commit | 1e5f96642bbf470934f245c98908337f75abb35a (patch) | |
tree | 32c6a26b31a4e27e7306ac7c9faa7159d65010a9 /src/synth | |
parent | d7ffe048ed623283655a11ffc5e75d6e5731f738 (diff) | |
download | ghdl-1e5f96642bbf470934f245c98908337f75abb35a.tar.gz ghdl-1e5f96642bbf470934f245c98908337f75abb35a.tar.bz2 ghdl-1e5f96642bbf470934f245c98908337f75abb35a.zip |
synth: introduce type_array_unbounded
Diffstat (limited to 'src/synth')
-rw-r--r-- | src/synth/elab-vhdl_debug.adb | 3 | ||||
-rw-r--r-- | src/synth/elab-vhdl_files.adb | 3 | ||||
-rw-r--r-- | src/synth/elab-vhdl_objtypes.adb | 118 | ||||
-rw-r--r-- | src/synth/elab-vhdl_objtypes.ads | 21 | ||||
-rw-r--r-- | src/synth/elab-vhdl_types.adb | 27 | ||||
-rw-r--r-- | src/synth/elab-vhdl_values-debug.adb | 6 | ||||
-rw-r--r-- | src/synth/elab-vhdl_values.adb | 1 | ||||
-rw-r--r-- | src/synth/synth-vhdl_environment.adb | 1 | ||||
-rw-r--r-- | src/synth/synth-vhdl_expr.adb | 3 | ||||
-rw-r--r-- | src/synth/synth-vhdl_insts.adb | 4 |
10 files changed, 139 insertions, 48 deletions
diff --git a/src/synth/elab-vhdl_debug.adb b/src/synth/elab-vhdl_debug.adb index 2cea530d7..31ec92e49 100644 --- a/src/synth/elab-vhdl_debug.adb +++ b/src/synth/elab-vhdl_debug.adb @@ -244,6 +244,7 @@ package body Elab.Vhdl_Debug is when Type_Protected => Put ("*protected*"); when Type_Unbounded_Array + | Type_Array_Unbounded | Type_Unbounded_Record | Type_Unbounded_Vector => Put ("*unbounded*"); @@ -326,6 +327,8 @@ package body Elab.Vhdl_Debug is Put ("unbounded_vector"); when Type_Array => Put ("array"); + when Type_Array_Unbounded => + Put ("array_unbounded"); when Type_Unbounded_Array => Put ("unbounded_array"); when Type_Unbounded_Record => diff --git a/src/synth/elab-vhdl_files.adb b/src/synth/elab-vhdl_files.adb index d5a92a966..21ae7c2bb 100644 --- a/src/synth/elab-vhdl_files.adb +++ b/src/synth/elab-vhdl_files.adb @@ -482,6 +482,7 @@ package body Elab.Vhdl_Files is Loc); end loop; when Type_Unbounded_Record + | Type_Array_Unbounded | Type_Unbounded_Array | Type_Unbounded_Vector | Type_Protected @@ -525,6 +526,7 @@ package body Elab.Vhdl_Files is File_Skip_Value (File, Typ.Rec.E (I).Typ, Loc); end loop; when Type_Unbounded_Record + | Type_Array_Unbounded | Type_Unbounded_Array | Type_Unbounded_Vector | Type_Protected @@ -638,6 +640,7 @@ package body Elab.Vhdl_Files is Loc); end loop; when Type_Unbounded_Record + | Type_Array_Unbounded | Type_Unbounded_Array | Type_Unbounded_Vector | Type_Protected diff --git a/src/synth/elab-vhdl_objtypes.adb b/src/synth/elab-vhdl_objtypes.adb index 1a04fc411..b8c154ed2 100644 --- a/src/synth/elab-vhdl_objtypes.adb +++ b/src/synth/elab-vhdl_objtypes.adb @@ -37,20 +37,21 @@ package body Elab.Vhdl_Objtypes is begin case Typ.Kind is when Type_Bit - | Type_Logic - | Type_Discrete - | Type_Float - | Type_Vector - | Type_Slice - | Type_Array - | Type_Record - | Type_Access - | Type_File => + | Type_Logic + | Type_Discrete + | Type_Float + | Type_Vector + | Type_Slice + | Type_Array + | Type_Record + | Type_Access + | Type_File => return True; when Type_Unbounded_Array - | Type_Unbounded_Vector - | Type_Unbounded_Record - | Type_Protected => + | Type_Array_Unbounded + | Type_Unbounded_Vector + | Type_Unbounded_Record + | Type_Protected => return False; end case; end Is_Bounded_Type; @@ -75,7 +76,8 @@ package body Elab.Vhdl_Objtypes is when Type_Float => return L.Frange = R.Frange; when Type_Array - | Type_Vector => + | Type_Array_Unbounded + | Type_Vector => if L.Alast /= R.Alast then return False; end if; @@ -84,7 +86,7 @@ package body Elab.Vhdl_Objtypes is end if; return Are_Types_Equal (L.Arr_El, R.Arr_El); when Type_Unbounded_Array - | Type_Unbounded_Vector => + | Type_Unbounded_Vector => if L.Ulast /= R.Ulast then return False; end if; @@ -252,24 +254,25 @@ package body Elab.Vhdl_Objtypes is begin case Typ.Kind is when Type_Bit - | Type_Logic - | Type_Discrete - | Type_Float => + | Type_Logic + | Type_Discrete + | Type_Float => -- Never copied. return; when Type_Access - | Type_File - | Type_Protected => + | Type_File + | Type_Protected => -- Never copied return; when Type_Array - | Type_Vector => + | Type_Array_Unbounded + | Type_Vector => Add_Array_Size_Type (Typ.Arr_El, Sz, Align); when Type_Unbounded_Array - | Type_Unbounded_Vector => + | Type_Unbounded_Vector => Add_Array_Size_Type (Typ.Uarr_El, Sz, Align); when Type_Record - | Type_Unbounded_Record => + | Type_Unbounded_Record => declare subtype T is Type_Type (Type_Record); subtype T_El is Rec_El_Array (Typ.Rec.Len); @@ -441,6 +444,25 @@ package body Elab.Vhdl_Objtypes is Arr_El => El_Type))); end Create_Array_Type; + function Create_Array_Unbounded_Type + (Bnd : Bound_Type; Last : Boolean; El_Type : Type_Acc) return Type_Acc + is + subtype Array_Unbounded_Type_Type is Type_Type (Type_Array_Unbounded); + function Alloc is + new Areapools.Alloc_On_Pool_Addr (Array_Unbounded_Type_Type); + begin + return To_Type_Acc (Alloc (Current_Pool, + (Kind => Type_Array_Unbounded, + Wkind => El_Type.Wkind, + Al => El_Type.Al, + Is_Global => False, + Sz => 0, + W => 0, + Abound => Bnd, + Alast => Last, + Arr_El => El_Type))); + end Create_Array_Unbounded_Type; + function Create_Unbounded_Array (Idx : Type_Acc; Last : Boolean; El_Type : Type_Acc) return Type_Acc is @@ -458,6 +480,18 @@ package body Elab.Vhdl_Objtypes is Uarr_Idx => Idx))); end Create_Unbounded_Array; + function Create_Array_From_Array_Unbounded + (Parent : Type_Acc; El : Type_Acc) return Type_Acc is + begin + if Parent.Alast then + return Create_Array_Type (Parent.Abound, True, El); + else + return Create_Array_Type + (Parent.Abound, False, + Create_Array_From_Array_Unbounded (Parent.Arr_El, El)); + end if; + end Create_Array_From_Array_Unbounded; + function Create_Unbounded_Vector (El_Type : Type_Acc; Idx : Type_Acc) return Type_Acc is @@ -479,7 +513,8 @@ package body Elab.Vhdl_Objtypes is begin case Arr_Type.Kind is when Type_Vector - | Type_Array => + | Type_Array + | Type_Array_Unbounded => return Arr_Type.Arr_El; when Type_Unbounded_Array | Type_Unbounded_Vector => @@ -750,9 +785,10 @@ package body Elab.Vhdl_Objtypes is return True; end if; return Get_Bound_Length (L.Arr_El) = Get_Bound_Length (R.Arr_El); - when Type_Unbounded_Array - | Type_Unbounded_Vector - | Type_Unbounded_Record => + when Type_Array_Unbounded + | Type_Unbounded_Array + | Type_Unbounded_Vector + | Type_Unbounded_Record => raise Internal_Error; when Type_Record => -- FIXME: handle vhdl-08 @@ -972,6 +1008,7 @@ package body Elab.Vhdl_Objtypes is raise Internal_Error; when Type_Unbounded_Vector | Type_Unbounded_Array + | Type_Array_Unbounded | Type_Unbounded_Record | Type_Protected | Type_File => @@ -1029,21 +1066,22 @@ package body Elab.Vhdl_Objtypes is case Res.Kind is when Type_Bit - | Type_Logic - | Type_Discrete - | Type_Float => + | Type_Logic + | Type_Discrete + | Type_Float => null; when Type_Slice => Res.Slice_El := Unshare (T.Slice_El, Pool); when Type_Array - | Type_Vector => + | Type_Array_Unbounded + | Type_Vector => Res.Arr_El := Unshare (T.Arr_El, Pool); when Type_Unbounded_Array - | Type_Unbounded_Vector => + | Type_Unbounded_Vector => Res.Uarr_El := Unshare (T.Uarr_El, Pool); Res.Uarr_Idx := Unshare (T.Uarr_Idx, Pool); when Type_Record - | Type_Unbounded_Record => + | Type_Unbounded_Record => Res.Rec := Create_Rec_El_Array (T.Rec.Len, Pool); for I in T.Rec.E'Range loop Res.Rec.E (I) := (Offs => T.Rec.E (I).Offs, @@ -1092,7 +1130,8 @@ package body Elab.Vhdl_Objtypes is Res.Arr_El := Unshare_Type (Typ.Arr_El, Get_Array_Element (Base), Global, Pool); - when Type_Unbounded_Array + when Type_Array_Unbounded + | Type_Unbounded_Array | Type_Unbounded_Vector | Type_Unbounded_Record => raise Internal_Error; @@ -1161,18 +1200,19 @@ package body Elab.Vhdl_Objtypes is -- Copy elements. case Res.Kind is when Type_Bit - | Type_Logic - | Type_Discrete - | Type_Float => + | Type_Logic + | Type_Discrete + | Type_Float => raise Internal_Error; when Type_Slice => raise Internal_Error; when Type_Array - | Type_Vector => + | Type_Vector => Save_Type (Typ.Arr_El, Res.Arr_El, Mem, Off, Mem_Sz); when Type_Unbounded_Array - | Type_Unbounded_Vector - | Type_Unbounded_Record => + | Type_Array_Unbounded + | Type_Unbounded_Vector + | Type_Unbounded_Record => raise Internal_Error; when Type_Record => declare diff --git a/src/synth/elab-vhdl_objtypes.ads b/src/synth/elab-vhdl_objtypes.ads index 08da1c266..f45f1051d 100644 --- a/src/synth/elab-vhdl_objtypes.ads +++ b/src/synth/elab-vhdl_objtypes.ads @@ -78,9 +78,20 @@ package Elab.Vhdl_Objtypes is -- A slice is for a slice of vector with dynamic bounds. So the bounds -- of the result aren't known, but its width is. Type_Slice, + + -- Fully bounded array. Type_Array, + + -- Array with indexes, but with unbounded element. + Type_Array_Unbounded, + + -- Array without bounds, possibly with unbounded elements. Type_Unbounded_Array, + + -- Record with at least one unbounded element. Type_Unbounded_Record, + + -- Fully bounded record. Type_Record, Type_Access, @@ -169,6 +180,7 @@ package Elab.Vhdl_Objtypes is when Type_Slice => Slice_El : Type_Acc; when Type_Array + | Type_Array_Unbounded | Type_Vector => Abound : Bound_Type; Alast : Boolean; -- True for the last dimension @@ -247,8 +259,11 @@ package Elab.Vhdl_Objtypes is return Type_Acc; function Create_Array_Type (Bnd : Bound_Type; Last : Boolean; El_Type : Type_Acc) return Type_Acc; + function Create_Array_Unbounded_Type + (Bnd : Bound_Type; Last : Boolean; El_Type : Type_Acc) return Type_Acc; function Create_Unbounded_Array (Idx : Type_Acc; Last : Boolean; El_Type : Type_Acc) return Type_Acc; + function Create_Rec_El_Array (Nels : Iir_Index32) return Rec_El_Array_Acc; function Create_Record_Type (Els : Rec_El_Array_Acc) return Type_Acc; @@ -265,6 +280,11 @@ package Elab.Vhdl_Objtypes is function In_Bounds (Bnd : Bound_Type; V : Int32) return Boolean; function In_Range (Rng : Discrete_Range_Type; V : Int64) return Boolean; + -- Create an Type_Array from an Type_Array_Unbounded by replacing the + -- element type. + function Create_Array_From_Array_Unbounded + (Parent : Type_Acc; El : Type_Acc) return Type_Acc; + -- Index type of unbounded array or unbounded vector. function Get_Uarray_Index (Typ : Type_Acc) return Type_Acc; @@ -280,6 +300,7 @@ package Elab.Vhdl_Objtypes is -- Return the element of a vector/array/unbounded_array. function Get_Array_Element (Arr_Type : Type_Acc) return Type_Acc; + -- Return True if TYP is bounded (at top level!). function Is_Bounded_Type (Typ : Type_Acc) return Boolean; function Are_Types_Equal (L, R : Type_Acc) return Boolean; diff --git a/src/synth/elab-vhdl_types.adb b/src/synth/elab-vhdl_types.adb index 9c80453b9..782de6b5e 100644 --- a/src/synth/elab-vhdl_types.adb +++ b/src/synth/elab-vhdl_types.adb @@ -566,14 +566,10 @@ package body Elab.Vhdl_Types is (Syn_Inst, Get_Array_Element (Parent_Typ), El_Type); else El_Typ := Parent_Typ; - loop - if Is_Last_Dimension (El_Typ) then - El_Typ := Get_Array_Element (El_Typ); - exit; - else - El_Typ := Get_Array_Element (El_Typ); - end if; + while not Is_Last_Dimension (El_Typ) loop + El_Typ := Get_Array_Element (El_Typ); end loop; + El_Typ := Get_Array_Element (El_Typ); end if; if not Get_Index_Constraint_Flag (Atype) then @@ -602,6 +598,7 @@ package body Elab.Vhdl_Types is -- FIXME: partially constrained arrays, subtype in indexes... if Get_Index_Constraint_Flag (Atype) then declare + El_Bounded : constant Boolean := Is_Bounded_Type (El_Typ); Res_Typ : Type_Acc; Bnd : Bound_Type; begin @@ -609,8 +606,13 @@ package body Elab.Vhdl_Types is for I in reverse Flist_First .. Flist_Last (St_Indexes) loop St_El := Get_Index_Type (St_Indexes, I); Bnd := Synth_Bounds_From_Range (Syn_Inst, St_El); - Res_Typ := Create_Array_Type - (Bnd, Res_Typ = El_Typ, Res_Typ); + if El_Bounded then + Res_Typ := Create_Array_Type + (Bnd, Res_Typ = El_Typ, Res_Typ); + else + Res_Typ := Create_Array_Unbounded_Type + (Bnd, Res_Typ = El_Typ, Res_Typ); + end if; end loop; return Res_Typ; end; @@ -618,6 +620,13 @@ package body Elab.Vhdl_Types is return Create_Unbounded_Array (Parent_Typ.Uarr_Idx, Parent_Typ.Ulast, El_Typ); end if; + when Type_Array_Unbounded => + if Is_Bounded_Type (El_Typ) then + return Create_Array_From_Array_Unbounded + (Parent_Typ, El_Typ); + else + raise Internal_Error; + end if; when Type_Vector | Type_Array => -- An alias with just a different resolver ? diff --git a/src/synth/elab-vhdl_values-debug.adb b/src/synth/elab-vhdl_values-debug.adb index c995c0204..f6d10e770 100644 --- a/src/synth/elab-vhdl_values-debug.adb +++ b/src/synth/elab-vhdl_values-debug.adb @@ -132,6 +132,8 @@ package body Elab.Vhdl_Values.Debug is Put ("slice"); when Type_Unbounded_Vector => Put ("unbounded vector"); + when Type_Array_Unbounded => + Put ("array_unbounded"); when Type_Unbounded_Array => Put ("unbounded arr ("); declare @@ -201,6 +203,8 @@ package body Elab.Vhdl_Values.Debug is Put ("slice"); when Type_Unbounded_Vector => Put ("unbounded vector"); + when Type_Array_Unbounded => + Put ("array unbounded"); when Type_Unbounded_Array => Put ("unbounded array"); when Type_Protected => @@ -274,6 +278,8 @@ package body Elab.Vhdl_Values.Debug is Put ("unbounded vector"); when Type_Unbounded_Array => Put ("unbounded array"); + when Type_Array_Unbounded => + Put ("array unbounded"); when Type_Unbounded_Record => Put ("unbounded record"); when Type_Protected => diff --git a/src/synth/elab-vhdl_values.adb b/src/synth/elab-vhdl_values.adb index deb0d0ccb..d1bdf15be 100644 --- a/src/synth/elab-vhdl_values.adb +++ b/src/synth/elab-vhdl_values.adb @@ -514,6 +514,7 @@ package body Elab.Vhdl_Values is end loop; end; when Type_Unbounded_Vector + | Type_Array_Unbounded | Type_Unbounded_Array | Type_Unbounded_Record => raise Internal_Error; diff --git a/src/synth/synth-vhdl_environment.adb b/src/synth/synth-vhdl_environment.adb index ee3280824..a1b3f4f9b 100644 --- a/src/synth/synth-vhdl_environment.adb +++ b/src/synth/synth-vhdl_environment.adb @@ -112,6 +112,7 @@ package body Synth.Vhdl_Environment is when Type_File | Type_Protected | Type_Access + | Type_Array_Unbounded | Type_Unbounded_Array | Type_Unbounded_Record | Type_Unbounded_Vector => diff --git a/src/synth/synth-vhdl_expr.adb b/src/synth/synth-vhdl_expr.adb index 7e28f5225..49fa4a546 100644 --- a/src/synth/synth-vhdl_expr.adb +++ b/src/synth/synth-vhdl_expr.adb @@ -635,6 +635,9 @@ package body Synth.Vhdl_Expr is return Vt; end if; end; + when Type_Array_Unbounded => + pragma Assert (Vtype.Kind = Type_Array); + return Vt; when Type_Unbounded_Array => pragma Assert (Vtype.Kind = Type_Array); return Vt; diff --git a/src/synth/synth-vhdl_insts.adb b/src/synth/synth-vhdl_insts.adb index dbecfe0ab..46f2983a2 100644 --- a/src/synth/synth-vhdl_insts.adb +++ b/src/synth/synth-vhdl_insts.adb @@ -382,6 +382,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => return 1; when Type_Record @@ -425,6 +426,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => Idx := Idx + 1; Descs (Idx) := (Name => Port_Sname, @@ -904,6 +906,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => if N /= No_Net then Connect (Get_Input (Inst, Port), N); @@ -942,6 +945,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => N := Get_Output (Inst, Idx); Idx := Idx + 1; |