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authorTristan Gingold <tgingold@free.fr>2022-06-04 08:47:37 +0200
committerTristan Gingold <tgingold@free.fr>2022-06-04 16:27:47 +0200
commitb36bdd7e0dc9988cd930631419c4ea53898ed7fd (patch)
treeeab7f353a40e5a5e3d59bcdf9e1eef5020721142 /src/synth
parent90ae71139bc39dc158f54e0337ed73f15033e77f (diff)
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synth-vhdl_eval: add support for more operators.
Fix some corner cases
Diffstat (limited to 'src/synth')
-rw-r--r--src/synth/synth-ieee-numeric_std.adb66
-rw-r--r--src/synth/synth-ieee-numeric_std.ads5
-rw-r--r--src/synth/synth-vhdl_eval.adb74
3 files changed, 121 insertions, 24 deletions
diff --git a/src/synth/synth-ieee-numeric_std.adb b/src/synth/synth-ieee-numeric_std.adb
index 656337ef6..10f19fb3e 100644
--- a/src/synth/synth-ieee-numeric_std.adb
+++ b/src/synth/synth-ieee-numeric_std.adb
@@ -351,13 +351,15 @@ package body Synth.Ieee.Numeric_Std is
Lb, Rb, Carry : Sl_X01;
R_Ext, L_Ext : Sl_X01;
begin
- Res.Typ := Create_Res_Type (L.Typ, Len);
- Res := Create_Memory (Res.Typ);
-
- if Len = 0 then
+ if Rlen = 0 or Llen = 0 then
+ Res.Typ := Create_Res_Type (L.Typ, 0);
+ Res := Create_Memory (Res.Typ);
return Res;
end if;
+ Res.Typ := Create_Res_Type (L.Typ, Len);
+ Res := Create_Memory (Res.Typ);
+
if Signed then
-- Extend with the sign bit.
L_Ext := Sl_To_X01 (Read_Std_Logic (L.Mem, 0));
@@ -457,13 +459,15 @@ package body Synth.Ieee.Numeric_Std is
Lb, Rb, Carry : Sl_X01;
R_Ext, L_Ext : Sl_X01;
begin
- Res.Typ := Create_Res_Type (L.Typ, Len);
- Res := Create_Memory (Res.Typ);
-
- if Len = 0 then
+ if Llen = 0 or Rlen = 0 then
+ Res.Typ := Create_Res_Type (L.Typ, 0);
+ Res := Create_Memory (Res.Typ);
return Res;
end if;
+ Res.Typ := Create_Res_Type (L.Typ, Len);
+ Res := Create_Memory (Res.Typ);
+
if Signed then
-- Extend with the sign bit.
L_Ext := Sl_To_X01 (Read_Std_Logic (L.Mem, 0));
@@ -555,6 +559,52 @@ package body Synth.Ieee.Numeric_Std is
return Sub_Vec_Int (L, R, True, Loc);
end Sub_Uns_Nat;
+ function Sub_Int_Vec
+ (L : Uns64; R : Memtyp; Signed : Boolean; Loc : Syn_Src) return Memtyp
+ is
+ Len : constant Uns32 := R.Typ.Abound.Len;
+ Res : Memtyp;
+ V : Uns64;
+ Lb, Rb, Carry : Sl_X01;
+ begin
+ Res.Typ := Create_Res_Type (R.Typ, Len);
+ Res := Create_Memory (Res.Typ);
+ if Len < 1 then
+ return Res;
+ end if;
+ V := L;
+ Carry := '1';
+ for I in 1 .. Len loop
+ Lb := Uns_To_01 (V and 1);
+ Rb := Sl_To_X01 (Read_Std_Logic (R.Mem, Len - I));
+ if Rb = 'X' then
+ Warning_Msg_Synth
+ (+Loc, "NUMERIC_STD.""+"": non logical value detected");
+ Fill (Res, 'X');
+ exit;
+ end if;
+ Rb := Not_Table (Rb);
+ Write_Std_Logic (Res.Mem, Len - I, Compute_Sum (Carry, Rb, Lb));
+ Carry := Compute_Carry (Carry, Rb, Lb);
+ if Signed then
+ V := Shift_Right_Arithmetic (V, 1);
+ else
+ V := Shift_Right (V, 1);
+ end if;
+ end loop;
+ return Res;
+ end Sub_Int_Vec;
+
+ function Sub_Nat_Uns (L : Uns64; R : Memtyp; Loc : Syn_Src) return Memtyp is
+ begin
+ return Sub_Int_Vec (L, R, False, Loc);
+ end Sub_Nat_Uns;
+
+ function Sub_Int_Sgn (L : Int64; R : Memtyp; Loc : Syn_Src) return Memtyp is
+ begin
+ return Sub_Int_Vec (To_Uns64 (L), R, True, Loc);
+ end Sub_Int_Sgn;
+
function Mul_Uns_Uns (L, R : Memtyp; Loc : Syn_Src) return Memtyp
is
Llen : constant Uns32 := L.Typ.Abound.Len;
diff --git a/src/synth/synth-ieee-numeric_std.ads b/src/synth/synth-ieee-numeric_std.ads
index 82e431584..69ebaae1a 100644
--- a/src/synth/synth-ieee-numeric_std.ads
+++ b/src/synth/synth-ieee-numeric_std.ads
@@ -49,9 +49,12 @@ package Synth.Ieee.Numeric_Std is
-- "-"
function Sub_Uns_Uns (L, R : Memtyp; Loc : Syn_Src) return Memtyp;
+ function Sub_Uns_Nat (L : Memtyp; R : Uns64; Loc : Syn_Src) return Memtyp;
+ function Sub_Nat_Uns (L : Uns64; R : Memtyp; Loc : Syn_Src) return Memtyp;
+
function Sub_Sgn_Sgn (L, R : Memtyp; Loc : Syn_Src) return Memtyp;
function Sub_Sgn_Int (L : Memtyp; R : Int64; Loc : Syn_Src) return Memtyp;
- function Sub_Uns_Nat (L : Memtyp; R : Uns64; Loc : Syn_Src) return Memtyp;
+ function Sub_Int_Sgn (L : Int64; R : Memtyp; Loc : Syn_Src) return Memtyp;
-- "*"
function Mul_Uns_Uns (L, R : Memtyp; Loc : Syn_Src) return Memtyp;
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb
index 5baced201..b14656b9e 100644
--- a/src/synth/synth-vhdl_eval.adb
+++ b/src/synth/synth-vhdl_eval.adb
@@ -848,39 +848,47 @@ package body Synth.Vhdl_Eval is
Res := Compare_Uns_Uns (Left, Right, Greater, Expr) = Equal;
return Create_Memory_Boolean (Res);
end;
- when Iir_Predefined_Ieee_Numeric_Std_Ne_Uns_Uns =>
+ when Iir_Predefined_Ieee_Numeric_Std_Eq_Sgn_Sgn =>
declare
Res : Boolean;
begin
- Res := Compare_Uns_Uns (Left, Right, Greater, Expr) /= Equal;
+ Res := Compare_Sgn_Sgn (Left, Right, Greater, Expr) = Equal;
return Create_Memory_Boolean (Res);
end;
- when Iir_Predefined_Ieee_Numeric_Std_Ne_Uns_Nat =>
+ when Iir_Predefined_Ieee_Numeric_Std_Eq_Uns_Nat =>
declare
Res : Boolean;
begin
- Res := Compare_Uns_Nat (Left, Right, Greater, Expr) /= Equal;
+ Res := Compare_Uns_Nat (Left, Right, Greater, Expr) = Equal;
return Create_Memory_Boolean (Res);
end;
- when Iir_Predefined_Ieee_Numeric_Std_Eq_Sgn_Sgn =>
+ when Iir_Predefined_Ieee_Numeric_Std_Eq_Sgn_Int =>
declare
Res : Boolean;
begin
- Res := Compare_Sgn_Sgn (Left, Right, Greater, Expr) = Equal;
+ Res := Compare_Sgn_Int (Left, Right, Greater, Expr) = Equal;
return Create_Memory_Boolean (Res);
end;
- when Iir_Predefined_Ieee_Numeric_Std_Eq_Uns_Nat =>
+ when Iir_Predefined_Ieee_Numeric_Std_Eq_Int_Sgn =>
declare
Res : Boolean;
begin
- Res := Compare_Uns_Nat (Left, Right, Greater, Expr) = Equal;
+ Res := Compare_Sgn_Int (Right, Left, Greater, Expr) = Equal;
return Create_Memory_Boolean (Res);
end;
- when Iir_Predefined_Ieee_Numeric_Std_Eq_Sgn_Int =>
+
+ when Iir_Predefined_Ieee_Numeric_Std_Ne_Uns_Uns =>
declare
Res : Boolean;
begin
- Res := Compare_Sgn_Int (Left, Right, Greater, Expr) = Equal;
+ Res := Compare_Uns_Uns (Left, Right, Greater, Expr) /= Equal;
+ return Create_Memory_Boolean (Res);
+ end;
+ when Iir_Predefined_Ieee_Numeric_Std_Ne_Uns_Nat =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Uns_Nat (Left, Right, Greater, Expr) /= Equal;
return Create_Memory_Boolean (Res);
end;
@@ -912,6 +920,20 @@ package body Synth.Vhdl_Eval is
Res := Compare_Uns_Nat (Left, Right, Less, Expr) = Greater;
return Create_Memory_Boolean (Res);
end;
+ when Iir_Predefined_Ieee_Numeric_Std_Gt_Sgn_Int =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Sgn_Int (Left, Right, Less, Expr) = Greater;
+ return Create_Memory_Boolean (Res);
+ end;
+ when Iir_Predefined_Ieee_Numeric_Std_Gt_Int_Sgn =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Sgn_Int (Right, Left, Greater, Expr) < Equal;
+ return Create_Memory_Boolean (Res);
+ end;
when Iir_Predefined_Ieee_Numeric_Std_Ge_Uns_Uns =>
declare
@@ -1027,6 +1049,20 @@ package body Synth.Vhdl_Eval is
Res := Compare_Sgn_Sgn (Left, Right, Greater, Expr) < Equal;
return Create_Memory_Boolean (Res);
end;
+ when Iir_Predefined_Ieee_Numeric_Std_Lt_Int_Sgn =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Sgn_Int (Right, Left, Less, Expr) > Equal;
+ return Create_Memory_Boolean (Res);
+ end;
+ when Iir_Predefined_Ieee_Numeric_Std_Lt_Sgn_Int =>
+ declare
+ Res : Boolean;
+ begin
+ Res := Compare_Sgn_Int (Left, Right, Greater, Expr) < Equal;
+ return Create_Memory_Boolean (Res);
+ end;
when Iir_Predefined_Ieee_Numeric_Std_Add_Uns_Uns
| Iir_Predefined_Ieee_Numeric_Std_Add_Uns_Log
@@ -1035,24 +1071,32 @@ package body Synth.Vhdl_Eval is
| Iir_Predefined_Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv =>
return Add_Uns_Uns (Left, Right, Expr);
- when Iir_Predefined_Ieee_Numeric_Std_Add_Sgn_Int =>
- return Add_Sgn_Int (Left, Read_Discrete (Right), Expr);
-
when Iir_Predefined_Ieee_Numeric_Std_Add_Uns_Nat
| Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Int =>
return Add_Uns_Nat (Left, To_Uns64 (Read_Discrete (Right)), Expr);
+ when Iir_Predefined_Ieee_Numeric_Std_Add_Nat_Uns =>
+ return Add_Uns_Nat (Right, To_Uns64 (Read_Discrete (Left)), Expr);
+
when Iir_Predefined_Ieee_Numeric_Std_Add_Sgn_Sgn =>
return Add_Sgn_Sgn (Left, Right, Expr);
+ when Iir_Predefined_Ieee_Numeric_Std_Add_Sgn_Int =>
+ return Add_Sgn_Int (Left, Read_Discrete (Right), Expr);
+ when Iir_Predefined_Ieee_Numeric_Std_Add_Int_Sgn =>
+ return Add_Sgn_Int (Right, Read_Discrete (Left), Expr);
when Iir_Predefined_Ieee_Numeric_Std_Sub_Uns_Uns =>
return Sub_Uns_Uns (Left, Right, Expr);
when Iir_Predefined_Ieee_Numeric_Std_Sub_Uns_Nat =>
return Sub_Uns_Nat (Left, To_Uns64 (Read_Discrete (Right)), Expr);
+ when Iir_Predefined_Ieee_Numeric_Std_Sub_Nat_Uns =>
+ return Sub_Nat_Uns (To_Uns64 (Read_Discrete (Left)), Right, Expr);
- when Iir_Predefined_Ieee_Numeric_Std_Sub_Sgn_Int =>
- return Sub_Sgn_Int (Left, Read_Discrete (Right), Expr);
when Iir_Predefined_Ieee_Numeric_Std_Sub_Sgn_Sgn =>
return Sub_Sgn_Sgn (Left, Right, Expr);
+ when Iir_Predefined_Ieee_Numeric_Std_Sub_Sgn_Int =>
+ return Sub_Sgn_Int (Left, Read_Discrete (Right), Expr);
+ when Iir_Predefined_Ieee_Numeric_Std_Sub_Int_Sgn =>
+ return Sub_Int_Sgn (Read_Discrete (Left), Right, Expr);
when Iir_Predefined_Ieee_Numeric_Std_Mul_Uns_Uns =>
return Mul_Uns_Uns (Left, Right, Expr);
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-24 05:35:43 +0000