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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-26 19:41:42 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-26 19:41:42 +0200 |
| commit | d8a3d241468d0a91b05d4277d06b87dbf67f5384 (patch) | |
| tree | 1740b69aacdd2269fa68bfbade4ff8c7a6e7c92d /src/synth | |
| parent | 2656aba97772d8495e036718368d037de68daf12 (diff) | |
| download | ghdl-d8a3d241468d0a91b05d4277d06b87dbf67f5384.tar.gz ghdl-d8a3d241468d0a91b05d4277d06b87dbf67f5384.tar.bz2 ghdl-d8a3d241468d0a91b05d4277d06b87dbf67f5384.zip | |
synth: do subtype conversion for expression at calls.
Diffstat (limited to 'src/synth')
| -rw-r--r-- | src/synth/synth-expr.adb | 6 | ||||
| -rw-r--r-- | src/synth/synth-oper.adb | 19 |
2 files changed, 10 insertions, 15 deletions
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb index 9c794dbf1..e73bd5fb2 100644 --- a/src/synth/synth-expr.adb +++ b/src/synth/synth-expr.adb @@ -1499,8 +1499,7 @@ package body Synth.Expr is when Iir_Kind_Simple_Name | Iir_Kind_Interface_Signal_Declaration -- For PSL. | Iir_Kind_Signal_Declaration => -- For PSL. - Res := Synth_Name (Syn_Inst, Expr); - return Synth_Subtype_Conversion (Res, Expr_Type, False, Expr); + return Synth_Name (Syn_Inst, Expr); when Iir_Kind_Reference_Name => return Synth_Name (Syn_Inst, Get_Named_Entity (Expr)); when Iir_Kind_Indexed_Name => @@ -1521,8 +1520,7 @@ package body Synth.Expr is N := Build_Extract (Build_Context, Get_Net (Res), Res.Typ.Rec.E (Idx + 1).Off, Get_Type_Width (Res_Typ)); - Res := Create_Value_Net (N, Res_Typ); - return Synth_Subtype_Conversion (Res, Expr_Type, False, Expr); + return Create_Value_Net (N, Res_Typ); end; when Iir_Kind_Character_Literal => return Synth_Expression_With_Type diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index ea72933ef..a3c76a728 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -196,6 +196,8 @@ package body Synth.Oper is Expr_Type : constant Node := Get_Type (Expr); Left_Type : constant Node := Get_Type (Inter_Chain); Right_Type : constant Node := Get_Type (Get_Chain (Inter_Chain)); + Left_Typ : constant Type_Acc := Get_Value_Type (Syn_Inst, Left_Type); + Right_Typ : constant Type_Acc := Get_Value_Type (Syn_Inst, Right_Type); Left : Value_Acc; Right : Value_Acc; @@ -212,14 +214,10 @@ package body Synth.Oper is function Synth_Compare (Id : Compare_Module_Id) return Value_Acc is N : Net; - L, R : Value_Acc; - Typ : Type_Acc; begin pragma Assert (Left_Type = Right_Type); - Typ := Get_Value_Type (Syn_Inst, Left_Type); - L := Synth_Subtype_Conversion (Left, Typ, False, Expr); - R := Synth_Subtype_Conversion (Right, Typ, False, Expr); - N := Build_Compare (Build_Context, Id, Get_Net (L), Get_Net (R)); + N := Build_Compare + (Build_Context, Id, Get_Net (Left), Get_Net (Right)); Set_Location (N, Expr); return Create_Value_Net (N, Boolean_Type); end Synth_Compare; @@ -343,12 +341,11 @@ package body Synth.Oper is Set_Location (N, Expr); return Create_Value_Net (N, Boolean_Type); end Synth_Compare_Sgn_Sgn; - begin - Left := Synth_Expression_With_Type - (Syn_Inst, Left_Expr, Get_Value_Type (Syn_Inst, Left_Type)); - Right := Synth_Expression_With_Type - (Syn_Inst, Right_Expr, Get_Value_Type (Syn_Inst, Right_Type)); + Left := Synth_Expression_With_Type (Syn_Inst, Left_Expr, Left_Typ); + Left := Synth_Subtype_Conversion (Left, Left_Typ, False, Expr); + Right := Synth_Expression_With_Type (Syn_Inst, Right_Expr, Right_Typ); + Right := Synth_Subtype_Conversion (Right, Right_Typ, False, Expr); case Def is when Iir_Predefined_Error => |