vhdl: replace base_type with parent_type in nodes

Only for subtype definition and remove base_type in type definitions.
Allows to better track the addition of contraints.

1 files changed, 1 insertions, 0 deletions

diff --git a/src/synth/synth-aggr.adb b/src/synth/synth-aggr.adb
index 6177c106d..7732744a1 100644
--- a/src/synth/synth-aggr.adb
+++ b/src/synth/synth-aggr.adb
@@ -25,6 +25,7 @@ with Netlists.Utils; use Netlists.Utils;
 with Netlists.Builders; use Netlists.Builders;
 
 with Vhdl.Errors; use Vhdl.Errors;
+with Vhdl.Utils; use Vhdl.Utils;
 
 with Synth.Errors; use Synth.Errors;
 with Synth.Expr; use Synth.Expr;