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author | Tristan Gingold <tgingold@free.fr> | 2017-12-21 18:57:01 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2017-12-21 18:57:01 +0100 |
commit | 249491882367ab939141107f2518a05bffc08efc (patch) | |
tree | 4d6b6ea61220c038dc2c08dd91c42b6b18cf0ac1 /src/vhdl/simulate/simul-elaboration.adb | |
parent | 5fa2ef4740596fdacfc3370541548759df2ab98b (diff) | |
download | ghdl-249491882367ab939141107f2518a05bffc08efc.tar.gz ghdl-249491882367ab939141107f2518a05bffc08efc.tar.bz2 ghdl-249491882367ab939141107f2518a05bffc08efc.zip |
simul: Add subprogram body in frames.
Diffstat (limited to 'src/vhdl/simulate/simul-elaboration.adb')
-rw-r--r-- | src/vhdl/simulate/simul-elaboration.adb | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/vhdl/simulate/simul-elaboration.adb b/src/vhdl/simulate/simul-elaboration.adb index e9b4a7b64..2163c80ff 100644 --- a/src/vhdl/simulate/simul-elaboration.adb +++ b/src/vhdl/simulate/simul-elaboration.adb @@ -349,6 +349,7 @@ package body Simul.Elaboration is Uninst_Scope => null, Up_Block => Father, Label => Stmt, + Bod => Null_Iir, Stmt => Obj, Parent => Father, Children => null, @@ -590,14 +591,18 @@ package body Simul.Elaboration is function Create_Protected_Object (Block: Block_Instance_Acc; Decl: Iir) return Iir_Value_Literal_Acc is - Bod : constant Iir := Get_Protected_Type_Body (Decl); + Bod : constant Iir := Execution.Get_Protected_Type_Body_Origin (Decl); + Bod_Info : constant Sim_Info_Acc := Get_Info (Bod); Inst : Block_Instance_Acc; Res : Iir_Value_Literal_Acc; begin Protected_Table.Increment_Last; Res := Create_Protected_Value (Protected_Table.Last); - Inst := Create_Subprogram_Instance (Block, null, Bod); + Inst := Create_Subprogram_Instance (Block, null, Decl); + if Bod_Info /= Get_Info (Decl) then + Inst.Uninst_Scope := Bod_Info; + end if; Protected_Table.Table (Res.Prot) := Inst; -- Temporary put the instancce on the stack in case of function calls @@ -2999,6 +3004,7 @@ package body Simul.Elaboration is Uninst_Scope => null, Up_Block => null, Label => Null_Iir, + Bod => Null_Iir, Stmt => Null_Iir, Parent => null, Children => null, |