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author | Tristan Gingold <tgingold@free.fr> | 2021-01-09 08:30:31 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2021-01-09 09:17:49 +0100 |
commit | 1f63d27df1c215331ad3c8e90c2f06695ee1d347 (patch) | |
tree | f657c1f81459911610fc8e107973dbd660749fe9 /src/vhdl/simulate/simul-elaboration.ads | |
parent | b01cf47ec4b1efebcfe8da8c336d749b6c3a6728 (diff) | |
download | ghdl-1f63d27df1c215331ad3c8e90c2f06695ee1d347.tar.gz ghdl-1f63d27df1c215331ad3c8e90c2f06695ee1d347.tar.bz2 ghdl-1f63d27df1c215331ad3c8e90c2f06695ee1d347.zip |
src/vhd: remove use of chapter sign in comment to have on ASCII characters
(except for vhdl-scanner)
Diffstat (limited to 'src/vhdl/simulate/simul-elaboration.ads')
-rw-r--r-- | src/vhdl/simulate/simul-elaboration.ads | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vhdl/simulate/simul-elaboration.ads b/src/vhdl/simulate/simul-elaboration.ads index 63fd11157..cc89d7bc0 100644 --- a/src/vhdl/simulate/simul-elaboration.ads +++ b/src/vhdl/simulate/simul-elaboration.ads @@ -66,7 +66,7 @@ package Simul.Elaboration is (Block: Block_Instance_Acc; Decl: Iir; Init : Init_Value_Kind) return Iir_Value_Literal_Acc; - -- LRM93 §12.3.1.3 Subtype Declarations + -- LRM93 12.3.1.3 Subtype Declarations -- The elaboration of a subtype indication creates a subtype. -- Used for allocator. procedure Elaborate_Subtype_Indication |