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author | Tristan Gingold <tgingold@free.fr> | 2017-12-11 18:34:44 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2017-12-11 18:34:44 +0100 |
commit | 911a0bfa0886f638fc82306d67d6b619d07173e6 (patch) | |
tree | fa8a1b2ea431ffb1451fb2d034ba947101239320 /src/vhdl/simulate/simul-execution.adb | |
parent | 2e1fadbd8c9fe7a3eebba9e54bb5a116caca78ea (diff) | |
download | ghdl-911a0bfa0886f638fc82306d67d6b619d07173e6.tar.gz ghdl-911a0bfa0886f638fc82306d67d6b619d07173e6.tar.bz2 ghdl-911a0bfa0886f638fc82306d67d6b619d07173e6.zip |
simul: emit proper error message for negative timeout.
Diffstat (limited to 'src/vhdl/simulate/simul-execution.adb')
-rw-r--r-- | src/vhdl/simulate/simul-execution.adb | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/vhdl/simulate/simul-execution.adb b/src/vhdl/simulate/simul-execution.adb index b7888608b..e18016c21 100644 --- a/src/vhdl/simulate/simul-execution.adb +++ b/src/vhdl/simulate/simul-execution.adb @@ -4638,8 +4638,7 @@ package body Simul.Execution is Release (Proc.Instance.Marker, Instance_Pool.all); end Finish_Procedure_Frame; - procedure Execute_If_Statement - (Proc : Process_State_Acc; Stmt: Iir_Wait_Statement) + procedure Execute_If_Statement (Proc : Process_State_Acc; Stmt : Iir) is Clause: Iir; Cond: Boolean; |