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author | Tristan Gingold <tgingold@free.fr> | 2020-04-02 08:20:42 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-04-02 19:45:47 +0200 |
commit | 013c41bf28a636e32d7b62e89293f4ff172a5491 (patch) | |
tree | 1def9199177c040cb4ab005870196c31c3aa4fa4 /src/vhdl/simulate/simul-simulation-main.adb | |
parent | cea5cdaaacc5b599ce7d9007315f029095ff1321 (diff) | |
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synth: more cleanup (and use of valtyp).
Diffstat (limited to 'src/vhdl/simulate/simul-simulation-main.adb')
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