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| author | Tristan Gingold <tgingold@free.fr> | 2017-01-12 08:04:21 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2017-01-13 18:57:24 +0100 |
| commit | 481c0b8d4a1045cbe192698055ff9d200d048079 (patch) | |
| tree | 164406a4be79e2d34894b1ef5bd3e15b560d4385 /src/vhdl/translate/trans-chap4.adb | |
| parent | 47ee0199a4d141c71619734572ea011d3c413c50 (diff) | |
| download | ghdl-481c0b8d4a1045cbe192698055ff9d200d048079.tar.gz ghdl-481c0b8d4a1045cbe192698055ff9d200d048079.tar.bz2 ghdl-481c0b8d4a1045cbe192698055ff9d200d048079.zip | |
vhdl08: allow PSL default clock declaration in block declarative parts.
Diffstat (limited to 'src/vhdl/translate/trans-chap4.adb')
| -rw-r--r-- | src/vhdl/translate/trans-chap4.adb | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index 3a1cad573..32dc21136 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -1676,6 +1676,11 @@ package body Trans.Chap4 is when Iir_Kind_Disconnection_Specification => null; + when Iir_Kind_Psl_Default_Clock => + null; + when Iir_Kind_Psl_Declaration => + null; + when Iir_Kind_Component_Declaration => Chap4.Translate_Component_Declaration (Decl); when Iir_Kind_Type_Declaration => @@ -2516,6 +2521,11 @@ package body Trans.Chap4 is -- FIXME: finalizers ? Chap2.Elab_Package_Instantiation_Declaration (Decl); + when Iir_Kind_Psl_Default_Clock => + null; + when Iir_Kind_Psl_Declaration => + null; + when others => Error_Kind ("elab_declaration_chain", Decl); end case; |