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authorTristan Gingold <tgingold@free.fr>2018-12-03 04:10:55 +0100
committerTristan Gingold <tgingold@free.fr>2018-12-03 04:10:55 +0100
commit27dde16b6a7e5ba415af918dc1591880bd2e6040 (patch)
tree56dcc8cb66c182cf90dc062d2417ec257d3f4748 /src/vhdl/translate/trans-chap8.adb
parent89551a8e7e3c004f1fec71c877ebccbea11e083f (diff)
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translate: handle unbounded aggregate for signal target.
Fix for #676.
Diffstat (limited to 'src/vhdl/translate/trans-chap8.adb')
-rw-r--r--src/vhdl/translate/trans-chap8.adb29
1 files changed, 23 insertions, 6 deletions
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index 7726c3719..8c34b6b7b 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -3987,9 +3987,9 @@ package body Trans.Chap8 is
(Aggr, Target_Type, New_Obj_Value (Idx));
Sub_Type := Get_Element_Subtype (Target_Type);
else
- Sub_Aggr := Chap3.Slice_Base
- (Aggr, Target_Type, New_Obj_Value (Idx));
Sub_Type := Get_Type (Expr);
+ Sub_Aggr := Chap3.Slice_Base
+ (Aggr, Sub_Type, New_Obj_Value (Idx));
end if;
when others =>
Error_Kind ("translate_signal_target_array_aggr", El);
@@ -4304,16 +4304,33 @@ package body Trans.Chap8 is
Drv : out Mnode)
is
Target_Type : constant Iir := Get_Type (Target);
+
+ Target_Tinfo : Type_Info_Acc;
+ Bounds : Mnode;
begin
if Get_Kind (Target) = Iir_Kind_Aggregate then
Chap3.Translate_Anonymous_Subtype_Definition (Target_Type, False);
- Targ := Create_Temp (Get_Info (Target_Type), Mode_Signal);
- if Get_Constraint_State (Target_Type) /= Fully_Constrained then
- raise Internal_Error;
+ Target_Tinfo := Get_Info (Target_Type);
+ Targ := Create_Temp (Target_Tinfo, Mode_Signal);
+ if Target_Tinfo.Type_Mode in Type_Mode_Unbounded then
+ Bounds := Dv2M (Create_Temp (Target_Tinfo.B.Bounds_Type),
+ Target_Tinfo,
+ Mode_Value,
+ Target_Tinfo.B.Bounds_Type,
+ Target_Tinfo.B.Bounds_Ptr_Type);
+ New_Assign_Stmt
+ (M2Lp (Chap3.Get_Composite_Bounds (Targ)),
+ M2Addr (Bounds));
+ -- Build bounds from aggregate.
+ Chap7.Translate_Aggregate_Bounds (Bounds, Target);
+ Chap3.Allocate_Unbounded_Composite_Base
+ (Alloc_Stack, Targ, Target_Type);
+ Translate_Signal_Target_Aggr
+ (Chap3.Get_Composite_Base (Targ), Target, Target_Type);
else
Chap4.Allocate_Complex_Object (Target_Type, Alloc_Stack, Targ);
+ Translate_Signal_Target_Aggr (Targ, Target, Target_Type);
end if;
- Translate_Signal_Target_Aggr (Targ, Target, Target_Type);
else
if Mechanism = Signal_Assignment_Direct then
Chap6.Translate_Direct_Driver (Target, Targ, Drv);